节点文献
一种25MS/s高精度采样保持器的设计
A 25 MS/s High Precision Sample-and-Hold Circuit
【摘要】 介绍了一种高精度采样保持器。密勒电容反馈的引入,使等效保持电容大大增加,从而有效地抑制了模拟开关的电荷注入效应带来的采样误差;设计大共模输入范围的高增益带宽积的放大器,以提高信号差模输入范围和精度;采用由分频器组成的准采样电路,避免了保持输出信号的抖动对后级电路(如ADC的比较器)的影响。设计采用TSMC 0.25μm 3.3 V CMOS工艺,仿真结果表明,该采样比较器在全范围输入1.1 MHz,采样率25 MS/s时,单音主杂比高于56 dB;全范围输入110 kHz,采样率10 MS/s时则高达近80 dB。
【Abstract】 A high precision sample-and-hold circuit is presented,in which Miller feedback capacitor is used to increase equivalent hold capacitance greatly,so as to depress the sampling error due to MOS charge feedthrough.High GBW amplifier with large input common-mode range(ICMR) is introduced to enhance differential-mode range of input signals.Quasi-sample circuit composed of frequency divider avoids the glitch of the output signal affecting subsequent circuits(like comparators in ADC).The circuit is simulated in TSMC’s 0.25 μm 3.3 V CMOS process.It has been shown that SFDR is over 56 dB for full scale,fin=1.1 MHz and fs=25 MS/s,and nearly 80 dB for full scale,fin=110 kHz and fs=10 MS/s.
【Key words】 Sample-and-hold circuits; Miller capacitor feedback; ICMR; Quasi-sample; SFDR;
- 【文献出处】 微电子学 ,Microelectronics , 编辑部邮箱 ,2007年01期
- 【分类号】TP335
- 【被引频次】1
- 【下载频次】353