【摘要】 随着单芯片时钟域个数的增多,高速稳定的时钟域数据交换技术对芯片性能的影响越来越重要。该文提出了一种新型的双时钟数据交换同步电路结构,通过多组相互流水且并行的同步器组,可以实现对burst数据的高速交换。该方案在保持与现有电路相同稳定性的同时,提高了数倍的数据吞吐量。更多还原

【Abstract】 With the fast development of SoC,more and more clock domains are merged into a single chip.Therefore a reliable high-speed synchronizer is more and more important for the performance of the whole system.This paper proposes a brand new circuit structure for synchronizers.And the high-speed synchronizer is fulfilled for burst-data operation based on multi-synchronizer groups,which are pipelined and paralleled to each other.The technology boosts not only the data handover speed for several times but keeps the same reliability as the most conservative synchronizer.更多还原