节点文献
基于DVB-C的符号同步电路优化设计
Optimization Design of Symbol Synchronization Circuit Based on DVB-C Standard
【摘要】 根据DVB-C标准,采用反馈环路实现符号同步,其中时钟误差检测器选择M&M算法.通过复用将符号同步电路中时钟误差检测器和环路滤波器的乘法器数目由六个减少到两个,减少了硬件规模.通过对所设计的符号同步环路仿真,环路能够在采样时钟抖动为200×10-6时完成对64QAM(正交幅度调制)信号的符号同步,并能在较短时间内达到收敛.
【Abstract】 This paper is based on the DVB-C standard,the feedback loop is adopted to realize symbol synchronization,in which the M&M algorithm is choosing into the timing error detector.The multipliers in the timing error detector and loop filter circuit are reduced from six to two by folding.By the simulations of the symbol synchronization loop,the loop can complete the symbol synchronization of the 64QAM signals under the condition of 200×10-6 sample timing dither,and get to constringency in lesser time.
【关键词】 符号同步;
定时误差探测器;
M&M算法;
【Key words】 symbol synchronization; timing error detector; M&M algorithm;
【Key words】 symbol synchronization; timing error detector; M&M algorithm;
- 【文献出处】 电子器件 ,Chinese Journal of Electron Devices , 编辑部邮箱 ,2007年02期
- 【分类号】TN702
- 【被引频次】6
- 【下载频次】86