节点文献
DVB系统中交织器和解交织器设计的FPGA实现
FPGA implementation of interleaver and deinterleaver in DVB systems
【摘要】 在现代数字通信系统中,对数据误码率的要求越来越高,通常一般的纠错码的纠错能力有限并且当发生连续长度比较大的错误时很难纠错,所以现代数字通信系统中采用交织与解交织的技术来减少数据错误的发生,基于欧洲标准的DVB数字电视通信系统中,都采用了这种交织与解交织技术。本文通过研究交织与解交织的原理,用FPGA来实现卷积交织,并且通过Modelsim工具进行功能仿真,利用Synplify综合工具进行综合,ISE实现布局布线验证实现效果。
【Abstract】 The requirement for data error rate is more and more rigorous in modern digital communication systems,the general error correction control is not able to deal with the long continuous errors in the communication systems,therefore,interleaver and deinterleaver is widely used in digital communication systems,such as DVB systems.This paper introduces the principle of the interleaver and deinterleaver and the FPGA(Field Programmable Gate Array)implement of interleaver and deinterleaver,and the effect of the implementation is proved through function simulation,synthesis,and cabling by using Modelsim,Synplify,and ISE eda tools respectively.
- 【文献出处】 电子测量技术 ,Electronic Measurement Technology , 编辑部邮箱 ,2007年08期
- 【分类号】TN791
- 【被引频次】3
- 【下载频次】181