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基于NIOSⅡ的高可靠性1553B总线接口实现
Implementation of 1553B Bus interface with high-reliability based on NIOS Ⅱ
【摘要】 针对当前1553B总线接口芯片为国外所垄断的情况,提出了基于Altera公司NIOSⅡ软核处理器实现1553B总线接口的嵌入式系统设计方案。采用SOPC技术和软硬件协同设计思想,把NIOSⅡ软核CPU与用户外设集成在一块FPGA上,在NIOSⅡIDE开发环境中编写软件;并用VHDL语言设计了自检测配置电路以实现1553B总线接口的高可靠性要求。该1553B总线接口经检测表明,能够满足MIL-STD-1553B数据总线标准,具有良好的军事和经济效益。
【Abstract】 As for the situation of the 1553B bus interface chip monopolized by fremdness at present,the embedded system design plan of implementing 1553B bus interface based on the NIOS Ⅱ soft-core processor of Altera Co is presented in this paper.The SOPC technology and idea of soft-hardware coordinate design are adopted,the NIOS Ⅱ soft-core processor and custom peripheral are integrated in a FPGA,and software is developed in NIOS Ⅱ IDE.Then,self-test and configuration circuit is designed with VHDL language to implement the high-reliability of system.After testing,the result shows that 1553B bus interface can satisfy the MIL-STD-1553B data bus standard and has some good military effect and economic benefit.
【Key words】 the 1553B bus interface; NIOS Ⅱ; soft-core processor; SOPC;
- 【文献出处】 电子测量技术 ,Electronic Measurement Technology , 编辑部邮箱 ,2007年06期
- 【分类号】TP334.7
- 【被引频次】5
- 【下载频次】118