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低成本的密钥长度可配置RSA密码协处理器VLSI设计
VLSI Design of a Low Cost and Reconfigurable RSA Crypto-Processor
【摘要】 采用基于字运算的高基Montgomery模乘算法,并且应用了改进的流水线组织结构,以较小的硬件开销实现了一个密钥长度最高可达2048bits、速度面积比性能很高的RSA密码协处理器.VLSI实现结果显示:不包含存储器的核心电路规模仅相当于18000等效门;基于0.25μmCMOS工艺,在180MHz的时钟频率下,1024bits的RSA加密速率可达28Kbps.该RSA密码协处理器非常适合于如智能IC卡等面积局限性高、成本敏感的产品中.
【Abstract】 Based on modified multiple-word radix-4 Montgomery algorithm and improved pipeline architecture, an area efficient RSA crypto-processor is implemented, which supports scalable keys of length up to 2048 bits. Based on 0.25μm standard CMOS technology, the coprocessor achieves a 1024-bit encryption rate of 28Kbps at 180MHz system clock frequency and the core circuit without RAM contains 18000 gates. The result shows that this processor is suitable for area-constrained applications such as smart cards.
【Key words】 high-radix Montgomery multiplication; RSA; crypto-processor; reconfigurable; VLSI;
- 【文献出处】 小型微型计算机系统 ,Journal of Chinese Computer Systems , 编辑部邮箱 ,2006年10期
- 【分类号】TN918.4
- 【被引频次】2
- 【下载频次】77