【摘要】 CMOS低压差集成稳压器是为便携式电子产品的需要而设计的一种低功耗、低压差集成稳压器.采用CMOS串联式集成稳压电路,内设过流保护电路、过热保护电路.给出了设计电路并分析了工作原理.采用CSMC 0.5μm工艺模型,利用Hspice对电路进行了仿真,仿真结果为:输出电压3.3 V,最大输出电流300 mA,最大静态电流80μA,当输出电流为300 mA时,压差为150 mV,满足低功耗,低压差集成稳压器的要求.更多还原

【Abstract】 CMOS low-dropout voltage regulator is a kind of low power consumption,low-dropout voltage integrated regulator designed for portable electronic product.LDO regulator adopts series-connected(integrated) regulator circuit including short circuit protection and thermal protection subcircuit.The(designed) scheme was provided and its principles were analyzed. Based on the CSMC 0.5?μm process model,the Hspice simulation had been done for the circuit.The result is as follow: output voltage being 3.3?V,(maximum) quiescent current being 80?μA,dropout voltage 150?mV at output current 300?mA.It can be seen from the result that the regulator satisfied the requirement of low power consumption and low dropout voltage.更多还原