节点文献
低压低功耗模拟集成电路设计技术及展望
Low-Voltage/Low-Power Technology for Analog IC’s and Its Prospect
【摘要】 低压、低功耗模拟集成电路设计受到多种因素的制约。围绕这些制约因素,回顾了国内外在模拟集成电路低压、低功耗设计领域的方法和技术的发展现状,主要涉及:轨对轨设计技术、亚阈值工作区技术、阈值电压降低技术、组合晶体管技术、横向BJT技术、SOI技术等。分析并比较了各种设计方法的优劣;并对模拟电路低压低功耗设计技术的发展趋势进行了展望。
【Abstract】 Development of low voltage and low power design methodologies and technologies for analog IC’s(around) the world is reviewed,which include rail-to-rail,subthreshold operation,threshold voltage reduction,composed transistor,lateral BJT,SOI and so on.Their advantages and disadvantages are analyzed and compared.And finally,the future development trend of the low-voltage and low-power technology for analog IC’s is discussed.
【关键词】 低压低功耗;
模拟集成电路;
轨对轨;
亚阈值工作区;
SOI;
【Key words】 Low-power/low-voltage; Analog IC; Rail-to-Rail; Subthreshold operation; SOI;
【Key words】 Low-power/low-voltage; Analog IC; Rail-to-Rail; Subthreshold operation; SOI;
- 【文献出处】 微电子学 ,Microelectronics , 编辑部邮箱 ,2006年01期
- 【分类号】TN431.1
- 【被引频次】52
- 【下载频次】1625