节点文献
时延和占空比可调的码型发生器的设计
Design and Implement of Pattern Generator Based on VXI Bus
【摘要】 码型发生器是用来满足特定数字测试要求的专用工具,其用途是生成具有一定数据格式的满足各种数字激励需求的数字信号;设计了一种基于VXI总线且时延、占空比和电压可调的码型发生器,文中首先概述其硬件方案以及功能的实现,并对实现时延和占空比可调的硬件电路进行详细说明;同时,简要介绍码型发生器输出电压可调的实现方法,并说明其所支持的几种数据输出格式;最后简述软件设计;目前该码型发生器在通讯设备的故障诊断和维修测试中得到广泛的应用。
【Abstract】 The pattern generator is a kind of particular tools t o fit the special conditions in tests and measurements. It provides actuating si gnals with precise edge and amplitude. The development of a pattern generator ba sed on VXI bus is introduced. The time delay, duty cycle and the voltage of the signals are adjustable. First the relational hardware schemes and functions are generally described, then several typical circuits are illustrated in detail. Af ter that, some pattern formats are presented. At last, the software design is in troduced. So far the pattern generator is extensively used in fault diagnosis, m aintenance and measurement of communication equipments.
【Key words】 VXI bus; pattern; time delay; duty cycle; variable le vel; intensifier PLL; DDS; NIOS II;
- 【文献出处】 计算机测量与控制 ,Computer Measurement & Control , 编辑部邮箱 ,2006年11期
- 【分类号】TP311.52;TP334.7
- 【被引频次】2
- 【下载频次】138