【摘要】 根据星载SAR成像算法的原理,提出了一种用FPGA实现该成像处理器的有效方法。该处理器的体系结构由算法直接映射而来,同时根据算法内在的时间关系将流水处理和并行处理相结合,从而极大地减少了处理时间。根据算法各运算对数据的精度要求不同,将浮点运算和定点运算结合在一块,既满足了成像的精度要求又节省了硬件开销。该系统工作在100MHz时,33s左右能完成16k*16k星载样本点的成像,并对加拿大Radarsat的雷达原始信号进行成像处理,成像质量能达到要求。更多还原

【Abstract】 This paper puts forward a valid method to design the on-board SAR real time imaging processor using seven pieces of Xilinx FPGA based on the CS arithmetic.The architecture of this processor is based on the CS arithmetic,also combines pipeline process and parallel process to reduce process time,and combines fixed point operation and floating point operation to reduce hardware resource.This system can image within 33 seconds when works in 100MHz,and the imaging quality can fit for the requirement by testing with the Radarsat raw data.更多还原