节点文献
两级Trace Cache的设计与研究
Design and research of two-level trace cache
【摘要】 通过引入二级trace cache做为一级trace cache补充,捕获那些由于一级trace cache容量冲突而被换出的trace,能够部分缓解trace cache容量失效问题.在进一步提高处理器的性能的同时,也大大降低了为构造trace而对指令cache带宽的要求,空闲的指令cache带宽可以进一步被trace的预构及其他一些技术所利用.实验表明,在64KB一级Trace Cache的基础上,引入一个容量为1MB的二级Trace Cache后,对于go和gcc这类工作集较大的程序,处理器的性能提高了13%,指令cache带宽要求下降27%.
【Abstract】 The idea of two-level Trace Cache is proposed which provide a second-level trace cache that captures replaced traces from first-level trace cache due to capacity conflict,to partly lighten this problem and improve processor performance. Accordingly,the access pressure of instruction cache is alleviated and such a free resource can be used in others aspects,such as trace preconstruction.Results show that for big-work-set programs,such as go and gcc,adding 1MB second-level trace cache to 64KB first-level trace cache increases processor performance by 13% and reduces access pressure of instruction cache by 27%.
【Key words】 trace cache; multi-level cache; capacity miss; trace,parallelism;
- 【文献出处】 哈尔滨工业大学学报 ,Journal of Harbin Institute of Technology , 编辑部邮箱 ,2006年09期
- 【分类号】TP332;TP311.1
- 【被引频次】4
- 【下载频次】118