【摘要】 针对有源像素(APS)CMOS图像传感器中的固定模式噪声(FPN),设计了一种动态数字双采样的噪声抑制新技术;该技术比普通双采样技术具有更佳的抑制效果,其电路结构简单,适合于像素尺寸不断缩小的CMOS图像传感器发展趋势。通过MPW计划,采用Chartered0.35μmCMOS工艺制作了测试ASIC芯片,试验结果表明动态数字双采样技术有效抑制了FPN噪声。更多还原

【Abstract】 In the paper, a new method to reduce fixed pattern noise (FPN) of active pixel (APS) CMOS image sensor, which is named dynamic digital double sampling (DDDS) technique, has been developed and approved to be of simpler circuit architecture and better suppression outcome compared with conventional double sampling technique. This simple design is suitable for the development trend of CMOS image sensor which requires smaller pixel dimension. The test ASIC chip is implemented based on the CMOS process of chartered 0.35 μm by MPW. Serial experiments validate that FPN can be suppressed effectively by dynamic digital double sampling technique.更多还原