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异步时序逻辑电路的设计方法探讨
A New Method for Designing Asynchronous Sequential Logic Circuit
【摘要】 在传统的同步时序电路设计方法的基础上,提出了一种新的异步时序电路的设计方法。该方法直接从时序电路的时序波形图,获得触发器的触发脉冲;根据时钟信号作用下引起的状态转换,填写次态卡诺图。其特点是原理简单,易于理解,使设计更加直观清楚。
【Abstract】 On the base of the traditional approaches for designing synchronous sequential circuits,a new approach for designing asynchronous sequential logic circuit is proposed in this paper where the trigger pulses can be directly obtained from sequential waveforms in sequential circuits,and the next state Karnaugh maps can be acomplished according to the state transformations caused by clock signals.The principle of this approach is easy to understood,and it makes the design more intuitive.
【关键词】 异步时序逻辑电路;
时钟信号;
次态卡诺图;
时序波形图;
【Key words】 asynchronous sequential logic; clock signal; next state Karnaugh map; sequential waveforms;
【Key words】 asynchronous sequential logic; clock signal; next state Karnaugh map; sequential waveforms;
- 【文献出处】 电气电子教学学报 ,Journal of Electrical & Electronic Education , 编辑部邮箱 ,2006年03期
- 【分类号】TN791
- 【下载频次】243