【摘要】 传统的时钟低摆幅触发器由于工作方式和电路结构不够合理,使得电路的结点电容和开关活动性较大,增加了电路的开关功耗。本文通过改进传统的时钟低摆幅触发器的工作方式和电路结构,设计了一种新型的时钟低摆幅双边沿触发器——反馈保持型时钟低摆幅双边沿触发器(Feedback Keeper Low-swing Clock Double-edge-triggered Flip-flop—FK-LSCDFF)。模拟结果表明所设计的触发器具有正确的逻辑功能,跟传统的时钟低摆幅双边沿触发器相比,降低近17%的功耗。更多还原

【Abstract】 Due to the drawbacks of performance and circuit structure in the conventional low-swing clock flip-flop, thcapacitors in nodes are relatively large, and its switching activity is quite high, which increase the switching powedissipation of the flip-flop. Thus, a new low-swing clock double-edge triggered flip-flop—Feedback Keeper Low-swinClock Double-edge-triggered Flip-flop (FK-LSCDFF) is proposed by improving the flip-flop’s operation mode and circuistructure. The results of simulation suggest that the designed FK-LSCDFF has correct logic function, and reduces 17% powedissipation compared with conventional low-swing clock double-edge-triggered flip-flop.更多还原