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衬底触发层叠式NMOS实现混合I/O静电保护机制研究

Research of Mixed-Voltage I/O ESD Protection Mechanism Implemented by Substrate-Triggered Technique

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【作者】 吴笛李树荣姚素英徐江涛

【Author】 WU Di,LI Shu-rong,YAO Su-ying,XU Jiang-tao (Tianjin University ASIC Design Center, Tianjin 300072, China)

【机构】 天津大学专用集成电路设计中心天津大学专用集成电路设计中心 天津300072天津300072

【摘要】 衬底触发技术可以大幅度提高大尺寸NMOS器件的ESD级别。将衬底触发技术融合到层叠式NMOS器件中来产生衬底触发层叠式NMOS器件,理论分析结果表明衬底触发技术可以提高混合电压I/O电路中层叠式NMOS器件的ESD稳健性,基于0.35μmCMOS工艺的模拟结果表明应用带有衬底触发技术的层叠式NMOS器件的HBM模型ESD级别提高约60%,这就验证了衬底触发设计对提高混合电压I/O电路的ESD级是有效的。

【Abstract】 The substrate-triggered technique has an obvious improve on ESD level of the large-dimension NMOS devices. The substrate-triggered stacked-NMOS device that combines the substrate-triggered technique into the stacked-NMOS device is investigated. From the academic results, the substrate-triggered technique can increase ESD robustness of the stacked-NMOS device in the mixed-voltage I/O circuit. From the experimental results in a 0.35 μm CMOS process, HBM ESD level of the proposed ESD protection design by using stacked-NMOS with substrate-triggered technique can be improved up to ~60%. This has verified the effectiveness of the substrate-triggered design to improve ESD level of mixed-voltage I/O circuits.

  • 【文献出处】 传感技术学报 ,Chinese Journal of Sensors and Actuators , 编辑部邮箱 ,2006年02期
  • 【分类号】TN432
  • 【下载频次】102
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