【摘要】 提出皮秒级电脉冲“缓冲减速”的原理是利用电容电荷存储网络来实现的。建立了电容电荷存储网络模型和有源缓冲电荷存储网络模型,设计出一种由GaAsMESFET和高频n沟道JFET构成的二级缓冲电荷存储网络。电路仿真结果表明,多级缓冲网络将快速的样品信号转换为低速的慢信号,信号模拟带宽从1.68GHz降到323kHz,可直接提供给低通带放大器和低速AD进行波形数据读取和处理,从而避免采用昂贵的宽带放大器和高速AD。更多还原

【Abstract】 It is pointed out that the principle of "buffering and slow-down" for picosecond electronic pulse is implemented with the charge holding capacitor network. The models of charge holding capacitor network and active-buffering charge holding network were established. A second-order charge holding network was designed which consists of GaAs MESFET and high- frequency n-channel JFET. The circuit simulation showed that high-speed sampling signal could be changed into low-speed signal by multiple buffering network, and the analog bandwidth of signal was reduced from 1.68 GHz to 323 kHz, so the output of buffering network could be directly used for the data processing and read-out by low-bandwidth amplifier and low-speed ADC, avoid- ing using expensive broad-band amplifier and high-speed ADC.更多还原