【摘要】 利用准分子激光原位淀积方法制备了BIT/PZT/BIT,PZT/BIT和BIT层状铁电薄膜,获得了电流密度-电压(I-V)回线和极化强度P-V电滞回线。在这三种结构中,Au/BIT/PZT/BIT/p-Si(100)结构的界面电位降、内建电压及频率效应是最小的。在电压转变电VT、饱和极化强度PS及矫顽场VC之间有三种关系,他们与I-V回线及P-V回线的关系相匹配,这种匹配关系使得以I-V回线操作的存储器将能够非挥发和非破坏读出及具有保持力。更多还原

【Abstract】 Multiplayer ferroelectric thin films BIT/PZT/BIT,PZT/BIT and BIT were deposited on (100) ptype silicon wafers by pulsed excimer laser.IV loop and PV loop were obtained.Among three structures,the voltage drop and built in voltage anad frequency effect at the interface of Au/BIT/PZT/BIT/pSi(100) is the smallest.There are three relations between VT,Ps and Vc,which are the conditions of the match relation between IV loop and PV loop,which maintains that this memory operated IV loop will enable nonvolatile memory,nondestructive readout and retention.更多还原