节点文献
Unfolding算法实现的高速并行CRC电路的VLSI设计
High-Speed Parallel CRC Circuits in VLSI Based on Unfolding Algorithm
【摘要】 文章通过分析Unfolding算法和被广泛应用的串行CRC校验电路,提出了一种新的高速并行CRC电路,给出了推导过程,并对它的优缺点进行了讨论。
【Abstract】 This paper presents a novel High-Speed Parallel CRC Circuits in VLSI Based on the analysis of Unfolding algorithm and the conventional serial CRC Architecture.This paper also presents the way to get it and discusses its a dvantages and disadvantages.
- 【文献出处】 微电子学与计算机 ,Microelectronics & Computer , 编辑部邮箱 ,2002年12期
- 【分类号】TN402
- 【被引频次】9
- 【下载频次】113