节点文献
一个流水线型三维DCT硬件核的设计
Design of Pipelining Three-dimension DCT Core
【摘要】 在优化3D-DCT算法的基础上,采用流水线型结构,系数转换、矩阵转置、数据装载和截位的通盘解决方式,构造一个流水线型的三维DCT硬件核,使运动图像的压解中DCT运算的CPU耗时下降十几倍,实现实时压缩。
【Abstract】 For the real-time compressing and transmission of motion image, a pipelining three-dimensional DCT core is constructed by optimizing three-dimension DCT arithmatic, adopting pipelining construction and using a surveying way of parameter conversion, data loading and cliping. As a result, the operations for compressing and decompressing of motion image become brief, the CPU time for three-dimensional DCT descends about a dozen times. The real-time compressing and decompressing can be achieved completely.
【关键词】 三维离散余弦变换;
实时压缩;
流水线型乘积移位累加运算部件;
【Key words】 three-dimension DCT; real-time compressing; pipelining product shift add operation unit;
【Key words】 three-dimension DCT; real-time compressing; pipelining product shift add operation unit;
【基金】 国家863项目(863-317-03-01-05-20)基金资助
- 【文献出处】 通信技术 ,Communications Technology , 编辑部邮箱 ,2002年05期
- 【分类号】TN919.81
- 【下载频次】27