【摘要】 介绍了FPGA/CPLD器件.以串行加法器的设计实例,系统地阐述了FPGA/CPLD实现数字电 路的设计方法,并在MAX+PLUSII境下成功地进行了仿真和编程下载.更多还原

【Abstract】 This paper introduces devices of FPGA/CPLD. By the analyzing design of serial adder, this paper also describes in detail the design method of implementing the digital circuit with FPGA/CPLD. The result of simulation and programmable down load devices using MAX+PLUSII Design Compiler is successfully obtained.更多还原