【摘要】 通过对低位先比串行数值比较器和高位先比串行数值比较器的设计及分析 ,证明了应用门控时钟技术设计的时序电路具有明显的低功耗特性 .PSPICE模拟结果证明了基于门控技术设计的电路能有效地降低电路的功耗 ,并保持正确的逻辑功能更多还原

【Abstract】 By designing and analyzing the serial magnitude comparators from LSB to MSB and from MSB to LSB respectively, the sequential circuit using the clock-gating technique showed evident character of low power dissipation. Furthermore, PSPICE simulation proved that circuits based on the clock-gating technique can reduce power dissipation effectively, while keeping the correct logic function.更多还原