【摘要】 设计了基于PCI总线的ROIC测试数据采集系统 ,在该系统上实现了帧缓存 ,从而更好地连接微机系统慢速的外围电路和高速的PCI接口 ;该系统还采用了遵从PCI规范CPLD作为逻辑控制更多还原

【Abstract】 The ROIC signal acquisition system based on PCI bus is designed. Higher transmission rate of bus is used to test more complex ROIC. At the same time, it is fact that PCI architecture is mainstream in field of PC. Frame buffer storage is used in our design that is useful for connecting slow transmission rate of periphery circuit to higher PCI bus. CPLD complying with PCI specification is used that is master of logic time control.更多还原