节点文献
以存储器为中心的路由器MRouter
MRouter:The Router Based on Memory Centric Mechanism
【摘要】 并行系统的互连技术一直是高性能计算机的一个关键研究领域 .在本文作者 1999年中提出了一种基于多端口快速存储器的新型互连体系结构 MCIM,并在此基础上构造出规模为 16— 12 8个 CPU的结点系统 [1 ] .该文将 MCIM原理应用在互连网络通信技术上 ,实现了一种以存储器系统为中心的路由器 MRouter.它采用流水操作和穿通传输技术 ,可用于构成低延时、高带宽的高性能互连网络 .将这种互连网络与上述结点系统结合 ,可以实现更大规模的并行系统 .而且其无论在板级或是结点级都采用同一种互连技术 ,有利于系统的模块化实现 .文中介绍了以存储器为中心的互连机制 MCIM的原理 ,同时描述了以存储器为中心的路由器 MRouter的结构及数据传输流程 .在仿真实验中作者对 MCIM的互连通信技术和其它互连技术进行了测试和比较 .
【Abstract】 The interconnection network in parallel systems remains a key issue in high performance computer research. In 1999, we proposed a new interconnection mechanism called MCIM, which is based on the multiport fast memory system and can be used to construct a hypernode with 16—128 processors. In this paper we construct an interconnect Router, MRouter, on the basis of MCIM, which supports the pipelined Cut Through data transfer mode. The interconnection network made of MRouter has the lower latency and higher bandwidth. A concordant large scale parallel system can be implemented by connecting the MCIM hypernodes with MRouter network, because the same interconnect mechanism is applied in both the board level and machine level interconnection. In this paper we present the principle of MCIM (Memory Centric Interconnection Mechanism) and depict the structure of MRouter, a MCIM Router,and describes its data transferring procedure. In simulation experiment we test and compare the Memory Centric Interconnect with other communication techniques. At last we put forward a fast multiport memory model for current implementation.
【Key words】 parallel processing; memory centric interconnect mechanism; interconnect network;
- 【文献出处】 计算机学报 ,Chinese Journal of Computers , 编辑部邮箱 ,2001年03期
- 【分类号】TN915.05
- 【下载频次】51