【摘要】 提出了一种针对基于SRAM型的现场可编程门阵列 (FPGA)的新型容错方法 ,包括一套容错结构以及对应的布线过程 .此方法对可编程逻辑单元 (CLB)和连线资源的代价都予以考虑 ,容错布线过程简单 ,耗时少 .模拟结果还显示 ,该方法与以前的方法比较 ,具有较低的代价更多还原

【Abstract】 A novel fault tolerant approach for SRAM Based FPGAs is presented. The proposed approach includes a fault tolerant architecture and its related routing procedure. In this approach, the overheads for CLBs and interconnects are considered. Under this novel approach the fault tolerant routing procedure is simple and less time consuming. The simulation results show that the proposed approach has lower overhead than previous by published methods.更多还原