【摘要】 对部分耗尽 CMOS/ SOI工艺进行了研究 ,成功地开发出成套部分耗尽 CMOS/ SOI抗辐照工艺 .其关键工艺技术包括 :PBL (Poly- Buffered L OCOS)隔离、沟道工程和双层布线等技术 .经过工艺投片 ,获得性能良好的抗辐照 CMOS/ SOI器件和电路 (包括 10 1级环振、 5 0 0 0门门海阵列和 6 4K CMOS/ SOI静态存储器 ) .其中 ,NMOS:Vt=1.2 V ,BVds=7.5— 9V ,μeff=42 5 cm2 / (V· s) ,PMOS:Vt=- 0 . 9V,BVds=14— 16 V,μeff=2 40 cm2 /(V· s) ,当工作电压为 5 V时 ,0 .8μm环振单级延迟为 10 6 ps,SOI 6 4K CMOS静态存储器数据读取时间为 40 ns更多还原

【Abstract】 The partially depleted CMOS/SOI technology is studied.And the PD CMOS/SOI radiant technology has been developed successfully,including the key technologies,such as poly-buffered LOCOS,channel engineer and double-level metallization.Well-behaved devices and circuits are obtained,in which NMOS:V t=1 2V,BV ds =7 5—9V,μ eff =425cm 2/(V·s),PMOS:V t=-0.9V,BV ds =14—16V,μ eff =240cm 2/(V·s);the per-stage propagation delay of 101-stage 0.8μm CMOS/SOI ring oscillator is 106ps under 5V supply voltage;and the SOI 64Kb CMOS SRAM is obtained with the fast access time of 40ns.更多还原