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嵌入式处理器中的慢总线技术应用
Application of Slow-bus Technology in Embedded Processor System
【摘要】 提出一种嵌入式处理器“慢总线技术”,采用状态机描述总线接口时序,用软件实现与外围硬件的总线接口工操作。并以嵌入式RISC微控制器芯片(PIC16C54)为例,描述了对DTMF编/解码芯片(MT8880)接口访问的实现方法。
【Abstract】 In the paper, a technology of "Slow-bus" in embedded processor is proposed, which is implemented by software, to solve the problem. By the software state-machine method, the timing of peripheral interface bus can be described as the sequence of states. In our paper, we give an implementation example of interface between RISC microprocessor PIC16C54 and DTMF code/decoder chip MT8880.
- 【文献出处】 计算机工程 ,COMPUTER ENGINEERING , 编辑部邮箱 ,2000年08期
- 【分类号】TP332
- 【下载频次】34