【摘要】 提高分压电阻网络输出参考电压的精度对设计高速A/D转换器有重要意义 .本文基于对参考电压非线性误差的分析提出一种并联式高精度参考电压电阻网络 ,给出其输出参考电压在最坏情况下的非线性误差分布形式 .详细的讨论以及模拟结果表明勿需补偿电路 ,并联式电阻网络通过减少支路电阻串上的电阻数目能有效地抑制由于负载效应造成的参考电压非线性误差 ,使得输出参考电压的精度明显提高 ,同时稳定速度加快 ,驱动负载能力强 ,对温度的灵敏度低 ,适合于多种结构的高速A/D转换器 ,如 :全并行、分步式、折叠式等 .更多还原

【Abstract】 It is significant to increase the precision of reference voltages produced by the reference resistor ladder at the front end of high speed A/D converters.To suppress nonlinear errors caused by the loading effect on the resistor ladder,a kind of parallel resistor ladder with fewer resistors on each branch is proposed.The error distribution of reference voltages along the parallel resistor ladder is also given.Without any compensation circuit,obvious precision improvement of reference voltages is achieved in addition to another advantages of faster settling speed、strengthened driving capability and lower temperature sensitivity.Both detailed analysis and simulation results show that it is very suitable for the use in high speed A/D converters such as flash、multi step and folding architectures,etc.更多还原