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一种基于闩锁结构的高速电压比较器

A New High-speed Latched Voltage Comparator

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【作者】 王萍石寅

【Author】 WANG Ping,SHI Yin(Institute of Semiconductors,Chinese Academy of Science,P.O.Box 912,Beijing,100083,China)

【机构】 中国科学院半导体研究所!北京100083

【摘要】 文章结合高速A/D转换器的研究设计了一种新型高速、高精度集成闩锁比较器 ,针对提高集成闩锁型电压比较器的性能 ,讨论了比较器失效、速度 功耗优化、时钟反馈噪声等设计问题 .该比较器有较高的输入电阻 ,对高频时钟的反馈噪声有较好的抑制性能 ,采用“电容中和技术”补偿预放大级带宽后更加适用于高速应用的需要 .文中给出了详细的性能分析以及采用PSPICE仿真的模拟结果 .

【Abstract】 A new regeneratively latched comparator is studied in the paper.Problems related to comparator failure,optimization between speed and power consumption and clock kickback effect are reviewed in order to improve the performance of the comparator.The proposed comparator has performance improvements such as a high input resistance,a less punishment from the clock kickback effect and a frequency bandwidth compensation of the preamplifier stage.Based on this,it has been integrated in a new high speed A/D converter with a kind of normal bipolar technology.Both the performance analyses and the simulation results with the tool of PSPICE of the comparator are provided in detail.

【关键词】 闩锁比较器A/D转换器触发器
【Key words】 latched comparatorA/D converterflip flop
  • 【文献出处】 电子学报 ,ACTA ELECTRONICA SINICA , 编辑部邮箱 ,2000年06期
  • 【分类号】TN6
  • 【被引频次】5
  • 【下载频次】315
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