【作者】 王娜； 王科； 陶嘉； 张颖； 史欣； 朱宏博；

【Author】 WANG Na;WANG Ke;TAO Jia;ZHANG Ying;SHI Xin;ZHU Hong-bo;State Key Laboratory of Particle Detection and Electronics, Institute of High Energy Physics, CAS;Institute of High Energy Physics, Chinese Academy of Sciences;University of Chinese Academy of Sciences;

【机构】 核探测与核电子学国家重点实验室中国科学院高能物理研究所； 中国科学院高能物理研究所； 中国科学院大学；

【摘要】 设计了硅像素探测器JadePix-1的高精度读出系统C_HDDAQ,适用于读出时钟频率中等、分辨要求高、读出通道多、总数据量大的半导体探测器读出应用,具有一定的通用性。采用"三段式"架构,读出子板对探测器模拟信号进行低噪声放大;母板提供低噪声电源和多通道、高精度模数信号转换;商用开发板对系统进行控制和数据打包、处理,最终信号经PCIe总线传输到上位机。经测试,读出系统工作稳定,性能良好,系统噪声约3.5 e~-,满足JadePix-1读出需求,同时基于此系统对探测器芯片性能进行了一系列测试,得到芯片噪声水平、像素增益、电荷收集效率及功耗等参数,结果满足CEPC CMOS硅像素探测器项目预期。更多还原

【Abstract】 The high-precision readout system C_HDDAQ of the silicon pixel detector JadePix-1 is designed which is suitable for semiconductor detector readout applications with medium readout rate, high resolution, large amount of readout channels and data. It is versatile to some extent. With the "three-stage" architecture, the daughter board performs low-noise amplification of the analog signal from detector; the motherboard provides low-noise power supply and multi-channel, highprecision analog-to-digital signal conversion; the commercial evaluation board controls the system and processes and packages the data. The processed data frame is transmitted to the host computer via the PCIe bus. The readout system works stably and has good performance through testing: The system noise is about 3.5 e-, which satisfies the JadePix-1 readout requirement. Meanwhile, based on this system, a series of tests are performed on the characteristics of the detector chip and parameters such as chip noise, pixel gain, charge collection efficiency and power consumption are obtained. All of them meet the CEPC CMOS silicon pixel detector project specifications.更多还原