【作者】 邢飞燕； 孙玲； 彭艳军；

【Author】 Xing Fei-Yan;Sun Ling;Peng Yanjun;Jiangsu Key Lab of ASIC Design,Nantong University;

【机构】 南通大学江苏省专用集成电路设计重点实验室；

【摘要】 基于SMIC 0.18μm RF CMOS工艺,完成了一种适用于交通专用短程通信系统的5.8GHz集成功率放大器设计。该电路采用了两级单端共源共栅结构和片上输入输出匹配网络,在Cadence软件环境下进行了电路的晶体管级电路仿真、版图设计与验证以及版图寄生参数提取与后仿真。版图后仿真结果表明,在3.3V电源电压下,该功率放大器在5.8GHz中心频率处功率增益为14.4 dB,输出1dB压缩点达到16.8dBm,输出三阶互调达到29 dBm。更多还原

【Abstract】 Based on SMIC 0.18-μm CMOS process,a 5.8-GHz Integrated power amplifier for DSRC application was proposed.The proposed power amplifier was consisted of two-stage single-ended cascode structure with on-chip input and output matching circuits.Transistor level circuit simulation,layout design and verification,as well as layout parasitic extraction and post-simulation of the PA were completed in Cadence software.The post simulation results show that,at 3.3V supply voltage,the power gain of the designed PA was 14.4 dB,1-dB gain compression point reached 16.8 dBm and the output IP3 was 29 dBm at the center frequency of 5.8 GHz.更多还原