【作者】 尹勇生； 陈志明； 邓红辉；

【Author】 YIN Yong-Sheng CHEN Zhi-Ming DENG Hong-Hui(Institute of VLSI Design,Hefei University of Technology,Hefei 230009,China)

【机构】 合肥工业大学微电子设计研究所；

【摘要】 压控振荡器(VCO)是锁相环(PLL)的关键部件,目前的多数研究都着重于 VCO 的电路级设计。文中采用 Verilog-AMS 语言对 VCO 进行行为建模,同时加入噪声模型,使得噪声在行为级设计中就可以得到体现。对比了有噪声和无噪声的 VCO 行为模型,利用 Cadence Spectre 仿真引擎对两个模型进行了验证,将内嵌 VCO 行为模型的 PLL 系统与电路级 PLL 系统做了对比分析,结沦为添加噪声的 VCO 行为模型更准确,更接近品体管级电路,对仿真的速度与精度做了较好的折中。更多还原

【Abstract】 Voltage Control Oscillator(VCO)is a key component of Phase-Locked Loop(PLL).Most of the research confined to the transistor-level design and noise studies.In this paper, VCO behavioral model is designed with Verilog-AMS language and VCO noise is contained in this model.So the noise will be incarnated in the behavioral design, system simulation is closer to the real circuit.In the addition,VCO model contained noise is compared with VCO model without noise model,and two models were simulated with Cadence Spectre in this paper.Adding noise VCO behavioral model is more accurate and closer to the transistor-level circuit.更多还原