【作者】 阎振华； 黄建国； 张群飞；

【Author】 YAN Zhenhua HUANG Jianguo ZHANG Qunfei College of Marine, Northwestern Polytechnical University, Xi’an, 710072

【机构】 西北工业大学航海学院；

【摘要】 为了满足阵列信号处理高速实时并行处理系统的要求,我们设计并实现了由多片ADSP-TS101构成的并行实时处理系统,采用FPGA的逻辑控制和松／紧联合耦合连接方式分别完成了多通道同步采样模块和多处理器的并行处理结构的硬件设计。解决了阵列信号处理中多通道同步采样和大数据量的高速实时处理的问题,同时该系统具有良好的稳定性和通用性。更多还原

【Abstract】 In order to satisfy the requirement of array signal processing to high-speed real-time parallel processing, a parallel real-time processing system, which is composed with multiple ADSP-TS101s was designed and was carried out. FPGA logical control was adopted for hardware design of multi-channel synchronous sample module, and cluster/data flow associated pin connection mode was adopted for multiprocessing parallel processing configuration. The key problems of multi-channel synchronous sampling and huge-data high-speed real-time processing for array signal processing are solved. Tested results show that this system conducts good stability and universality.更多还原