【作者】 刘强； 梁昊； 虞孝麒； 周永钊；

【Author】 Liu Qiang, Liang Hao, Yu Xiaoqi, Zhou Yongzhao (Department of Modern Physics, University of Science and Technology of China, Hefei, Anhui, 230026, P.R.China)

【机构】 中国科学技术大学近代物理系；

【摘要】 本文介绍了BESⅢ Muon鉴别器电子学系统的原型样机。样机使用FPGA技术,在探测器内部极有限的空间内实现了前端板的全部功能;而菊花链方法极大地减少了电缆的使用量,使整个系统设计十分简洁,既提高了可靠性又降低了成本。更多还原

【Abstract】 A prototype of the readout electronics for BESⅢ Muon Counter is introduced. The whole system looks very brief and reliable while all functions of the front-end card are implemented in the very limited interspace of the detector by using FPGA technology and much fewer cables are used by organizing the data access between front-end cards in a daisy-chain. Those above greatly reduce the cost of the system.更多还原