节点文献
混合信号SoC联合测试方案的设计
Design of Joint Testing Scheme on Mixed SoC
【Author】 Yang Zhou,Wang Hong,Yang Shiyuan (Department of Automation,Tsinghua University,Beijing 100084,China)
【机构】 清华大学自动化系;
【摘要】 混合信号SoC模拟核的测试是SoC测试的难点之一,常用片上DAC、ADC配合模拟核进行测试。本文对于片上DAC、模拟核、ADC同时待测的情况,基于模拟核的振荡测试、ADC柱状图测试和DAC脉宽测试等方法,提出联合测试方案。将重构模拟核产生的三角波振荡信号,分别作为ADC柱状图测试和DAC脉宽测试的激励,并引入ADC和DAC的直连测试作为补充,构建三者两两之间的联合测试。该方案对电路进行少量重构的条件下,自生成并复用测试激励,可实现对单故障的定位并解决双故障掩盖问题。
【Abstract】 Testing of analog cores is one of the main problems in testing of mixed-signal SoC.DAC,ADC on chips are usually used for testing analog cores.The author designed a joint testing scheme based on the methods of oscillation-test for analog cores,histogram-est for ADC and pulse width-test for DAC.The triangular wave from oscillation of analog cores is used as stimuli for both histogram-test for ADC and pulse width-test for DAC.As loopback testing method between DAC and ADC is added as complementation,pairwise joint tests for these three parts are implemented.This scheme can locate the single fault and solve the problem of concealment of pairwise faults with little rebuilding of circuit on test.
【Key words】 SoC; analog core; ADC; DAC; oscillation test; histogram test; pulse width test;
- 【会议录名称】 第十四届全国容错计算学术会议(CFTC’2011)论文集
- 【会议名称】第十四届全国容错计算学术会议(CFTC’2011)
- 【会议时间】2011-07-30
- 【会议地点】中国北京
- 【分类号】TN47
- 【主办单位】中国计算机学会容错计算专业委员会