【作者】 尚利宏； 周密； 胡瑜；

【Author】 Shang Lihong~1,Zhou Mi~1,and HuYu~2 1(School of Computer Science and Engineering,Beihang University,Beijing 100191) 2(Key Lab.of Computer System and Architecture,ICT,Chinese Academy of Sciences,Beijing 100190)

【机构】 北京航空航天大学计算机学院； 中国科学院计算技术研究所计算机系统结构重点实验室；

【摘要】 本文介绍了一种实现1553B总线智能节点功能的SOPC,并以此为例时本领域工程师们共同面临的可靠性问题进行了分析,展示了在民用FPGA上构建高可靠性低恢复延时的复杂系统的一种可行的方法.文中使用域划分模型对具有多个候选配置的可重构SOPC进行建模,从而将各候选配置的资源优化分配问题转化为二次规划问题求解,产生使可靠性最大的分配方案.使用盲重构的故障恢复技术降低恢复延时.本文还介绍了仿真实验,用于权衡系统的可靠性和恢复延时,从而确定合理的候选配置数量.实验表明,与传统的三模冗余技术相比,本方法能以更少的冗余资源提供更高的可靠性.更多还原

【Abstract】 A SOPC implementing a smart 1553B bus node is presented to investigate the challenges and illustrate a feasible approach for building a complex system aimed at high reliability and low recovery latency on a commercial FPGA.First,a general reliability model, the Domain-Partition(DP) model,is introduced to formulate the SOPCs which contain multiple alternative configurations.The problem of planning the overlaps of configurations to maximize the reliability is approximately formulated and solved as a second-order planning problem.The blind reconfiguration technique is used to reduce the recovery latency.The simulation experiments are carried out and a detailed trade-off analysis of the reliability and recovery latency is provided to determine the proper number of configurations.The obtained results show that higher reliability is attainable with less overhead than the generic triple-modular redundancy method.更多还原