【作者】 秦熙； 刘树彬； 安琪；

【Author】 Qin Xi1,2, Liu Shubin1,2, An Qi1,2 1Key Laboratory of Technologies of Particle Detection & Electronics, Chinese Academy of Sciences,2Anhui Key Laboratory of Physical Electronics, Department of Modern Physics, University of Science and technology of China, Hefei 230026, China

【机构】 中国科学院核探测技术与核电子学重点实验室； 物理电子学安徽省重点实验室中国科学技术大学近代物理系；

【摘要】 本文介绍了CERN设计的一款基于过阈时间法(Time-Over-Threshold)的ASIC芯片——NINO,并列出了一些基于NINO芯片设计的测试板的测试结果,用于评估该芯片在BESIII端盖TOF升级及在中子管位置灵敏探测器中的位置测量中应用的可能性。NINO芯片8通道高度集成,对实验电路板的设计和测试表明,其噪声抖动低(前沿噪声抖动约5.1ps),可以满足TOT方法中高精度时间测量的要求。更多还原

【Abstract】 This paper describes the test result of the NINO chip which is based on the time over threshold (TOT) technique. The test is carried out to evaluate the possibility of applying the chip in the upgrade of BES III TOF and in the position measurement of Neutrino Position Sensitive Proportional Detector. The NINO chip is 8 channel integrated and of low noise ( 5.1ps front edge jitter) which can serve high precision time measurement satisfactorily.更多还原