【作者】 吕继方； 王铮； 魏微； 严雄波；

【Author】 Lv Jifang1,2 , Wang zheng1, Wei Wei1,2, Yan Xiongbo1,2 (1. Institute of High Energy Physics,CAS, Beijing, 100049) (2. Graduate University of CAS, Beijing, 100049)

【机构】 中国科学院高能物理研究所； 中国科学院研究生院；

【摘要】 本文介绍了一种CMOS峰值保持电路。该电路具有精度高,输出摆幅大,驱动能力强等特点。本电路的工作过程包括"读"状态和"写"状态。在"写"状态时,通过OTA追踪信号,将峰值存储到保持电容中。在"读"状态时,将OTA连接成单位增益Buffer使用,将存储到保持电容上峰值读出。该工作过程可以有效消除放大器自身offset产生的影响,减小误差。通过仿真,该电路在输出幅度在400mV～1.8V范围内,误差小于1%。本电路将采用Chart0.35um工艺进行流片。更多还原

【Abstract】 This paper describes a high-precision CMOS peak detect and hold circuit. This circuit has characteristics of high precision , wide output voltage range and high driving capability . There are two working phases, write phase and read phase. In write phase, the amplifier tracks the input signal, and when the input starts to fall, it puts the peak voltage into hold capacitor. In read phase, it turns the amp into a unitygain buffer, and then reads out the peak voltage. The offset error of the amplifier does not contribute to the linearity. By simulation, the error is less than 1% in the output voltage range from 400mV to 1.8V. This circuit will be taped out using the chartered 0.35um CMOS process.更多还原