节点文献
SAR数据记录和回放接口的设计与实现
Design And Implementation of An Interface of SAR Data Record And Replay
【Author】 Jiang Dalong Zeng Dong Wang Yuezhong Li Shaohong Department of Electronic Engineering,BUAA,Beijing,100083
【机构】 北京航空航天大学电子工程系;
【摘要】 本文提出了一种SAR实时处理机与高速数据记录仪接口电路的实现方法,它使用i386EX和FPGA作为控制器对接受主处理机的命令以及其他各处理单元的握手信号,将各部分数据从其他处理板读出并写入本接口的相应缓存,打包后,将其写入高速数据记录仪。回放时,本接口将数据从记录仪读出,并写回至相应的处理单元,对数据进行进一步的处理。经过实验验证,达到了预期的效果,并在SAR实时处理机的调试过程中作为模拟数据源,发挥了很大的作用。
【Abstract】 A design of an interface between SAR real-time processor and high-speed data recorder is proposed in this paper.It employs i386EX and FPGA as controller to receive instructions from main processor board and handshakes from other processor boards,reads data from other boards processor and write them into the buffer on this interface board.At last,the data are recorded on the high-speed data recorder after being packaged.This interface can also replay the data from the recorder,and send them to the respective board for more and deeper processing.It has got anticipative effect in test,and been used in SAR real time processor debugging as data source.
- 【会议录名称】 第十届全国信号处理学术年会(CCSP-2001)论文集
- 【会议名称】第十届全国信号处理学术年会(CCSP-2001)
- 【会议时间】2001-11-01
- 【会议地点】中国广东深圳
- 【分类号】TN958
- 【主办单位】中国电子学会信号处理分会、中国仪器仪表学会信号处理分会