【作者】 高见；

【导师】 夏敦柱； 郝学元；

【作者基本信息】 东南大学 ， 电子信息（专业学位）， 2025， 硕士

【摘要】 单片集成三轴加速度计具有集成度高、成本低、功耗低等优点,被广泛用于导航制导、航空航天等领域,已成为微机械加速度计的一个重要研究方向。目前,三轴加速度计的主要结构为三轴电容式,但受到结构和检测机理的限制,精度难以得到提升。本文提出了一种由X/Y差动双轴谐振式和Z轴跷跷板电容式加速度计组成的新型硅微谐振-跷式单片集成三轴加速度计。本文以谐振-跷式三轴加速度计为研究对象,设计了三轴加速度计数字测控系统,完成测控系统硬件电路的设计和功能实现,最终进行谐振-跷式三轴加速度计整机实验。本文主要研究内容如下:(1)研究了谐振-跷式三轴加速度计的结构及其工作原理,通过振动模态仿真获取加速度计的谐振频率。建立谐振式和电容式加速度计的动力学模型,分析了谐振式加速度计的静电激励、驱动检测原理和电容式加速度计的工作原理。(2)设计了基于增强型锁相环(Enhanced Phase Locked Loop,EPLL)和正交锁相环(Quadrature Phase Locked Loop,QPLL)的谐振器相位控制环路,通过提升频率与幅度控制的稳定性,优化传统锁相环性能,以实现谐振器在低品质因数下的锁相驱动。构建了谐振器闭环幅度控制理论模型,结合根轨迹与带宽特性设计自动增益控制器,并设计数字化谐振器闭环控制系统,完成仿真验证。针对Z轴力平衡控制原理开展带宽特性与稳定性分析,据此设计电容式加速度计闭环检测电路。建立谐振器控制系统的相位噪声模型,通过仿真得出不同电路模块对噪声的影响,并研究时间抖动对采样系统信噪比影响。(3)设计了数字化控制系统的整体硬件平台,设计环形二极管电容检测电路和低通滤波器构成的模拟前端电路,并完成模数-数摸转换器选型和外围电路设计。基于FPGA搭建测控核心硬件电路,设计电源树与去耦网络,完成高速信号完整性优化,包括层叠结构、阻抗匹配与高速PCB设计。在数字电路中实现ADC与DAC驱动时序、低通滤波器与增量式PI控制器,以及EPLL与QPLL数字锁相驱动回路。分析等精度测频算法的误差来源,采用时间-数字转换芯片辅助的方法消除标准时钟±1的计数误差,提升测频精度。(4)对谐振-跷式三轴加速度计整机进行实验与验证,通过扫频实验,得出四个谐振器的谐振频率和品质因数。对整机的标度因数、零偏稳定性、跨轴灵敏度进行实验,结果表明,X/Y轴谐振式加速度计在EPLL驱动下的零偏稳定性分别为53.14 g、59.37 g,QPLL驱动下的零偏稳定性分别为50.69 g、55.24 g,在QPLL驱动下表现出了更好的零偏稳定性,Z轴的零偏稳定性为109.18 g,三轴加速度计的跨轴灵敏度低于0.5%。更多还原

【Abstract】 Monolithic integrated three-axis accelerometers have the advantages of high integration,low cost,and low power consumption.They are widely used in navigation,guidance,aerospace and other fields,and have become an important research direction of micromechanical accelerometers.At present,the main structure of the three-axis accelerometer is the three-axis capacitive type,but due to the limitations of the structure and detection mechanism,the accuracy is difficult to improve.This paper proposes a new silicon micro-resonant-seesaw monolithic integrated three-axis accelerometer composed of X/Y differential dual-axis resonant type and Z-axis seesaw capacitive accelerometers.This paper takes the resonant-seesaw three-axis accelerometer as the research object,designs a three-axis accelerometer digital measurement and control system,completes the design of the measurement and control system hardware circuit and functional implementation,and finally conducts a resonant-seesaw three-axis accelerometer whole machine experiment.The main research contents of this paper are as follows:(1)The micromechanical structure of the resonant-rocker triaxial accelerometer is introduced,and the resonant frequency of the accelerometer is obtained through vibration mode simulation.The dynamic models of resonant and capacitive accelerometers are established,and the electrostatic excitation and drive detection principles of the resonant accelerometer and the working principle of the capacitive accelerometer are introduced.(2)A resonator phase control loop based on an enhanced phase locked loop(EPLL)and a quadrature phase locked loop(QPLL)was designed.The performance of the traditional phase locked loop was optimized by improving the control stability of the frequency and amplitude,and the phase locked drive of the resonator was realized under low quality factor.A theoretical model of the closed-loop amplitude control of the resonator was constructed,and an automatic gain controller was designed by combining the root locus and bandwidth characteristics.A digital resonator closed-loop control system was designed by combining the phase control loop and the automatic gain controller,and simulation verification was performed.The bandwidth characteristics and stability analysis were carried out based on the Z-axis force balance control principle,and a capacitive accelerometer closed-loop detection circuit was designed based on this.A phase noise model of the resonator control system was established,and the influence of different circuit modules on noise was obtained through simulation,and the influence of time jitter on the signal-to-noise ratio of the sampling system was studied.(3)Designed the overall hardware platform of the digital control system,designed the analog front-end circuit consisting of the ring diode capacitance detection circuit and the low-pass filter,and completed the selection of the analog-to-digital converter and the peripheral circuit design.The core hardware circuit of the measurement and control based on FPGA was built,the power tree was constructed and the decoupling network was designed.Based on the high-speed signal integrity theory,the stacking structure and impedance matching design,as well as the high-speed PCB design were completed.The drive timing control of ADC and DAC,the low-pass filter and the incremental PI controller,as well as the EPLL and QPLL digital phase-locked drive loops were implemented in the digital circuit.The error sources of the equal-precision frequency measurement algorithm were analyzed,and the counting error of the standard clock±1 was eliminated by using the time-to-digital conversion chip-assisted method to improve the frequency measurement accuracy.(4)The resonant-rocker triaxial accelerometer was tested and the resonant frequencies and quality factors of the four resonances were obtained through frequency sweep experiments.The scale factor,zero bias stability,and cross-axis sensitivity of the whole machine were experimentally tested.The results showed that the zero bias stability of the X-axis and Y-axis resonant accelerometers driven by EPLL were 53.14 g and 59.37 g,respectively,and the zero bias stability of the X-axis and Y-axis driven by QPLL were 50.69g and 55.24 g,respectively.Under the QPLL drive,it showed better zero bias stability,the zero bias stability of the Z axis was 109.18 g,and the cross-axis sensitivity of the triaxial accelerometer was less than 0.5%.更多还原