【作者】 王亮；

【导师】 许耀华； 柏娜；

【作者基本信息】 安徽大学 ， 集成电路工程（专业学位）， 2023， 硕士

【摘要】 随着科技进步,半导体迈进纳米级工艺。晶体管特征尺寸的缩小拉近了静态存储器中敏感节点间的物理距离,降低敏感节点的寄生电容和临界电荷,造成电荷共享效应加剧,多节点翻转的发生率日益增加。全定制芯片存在开发周期长、试错成本高且效率低的缺点。与全定制芯片相比,半定制芯片利用EDA工具进行自动化设计,提高芯片的设计效率并大大缩短了产品需求向实际产品转化的时间。因此,本文设计一款抗多节点翻转的抗辐射SRAM存储器并实现该抗辐射SRAM的生成器。抗辐射SRAM主要研究SRAM的电路级加固、版图级加固。主要研究内容如下:(1)对比经典的抗辐射SRAM加固电路,分析各电路的工作原理、容错原理和优缺点,最后结合抗多节点翻转电路加固的设计原理设计一款基于PMOS堆叠结构和NMOS堆叠结构的S8P8N单元。仿真结果证明,与传统的DICE结构相比,S8P8N单元的双节点翻转率下降了75%,三节点翻转率降低了50%,实现了DICE不能容忍三节点翻转的突破。此外,在具体的实现中采用多阈值技术进一步降低电路功耗。(2)随着工艺缩减、工作电压降低和集成电路复杂度的提升,SET成为软错误的主要来源之一。因此,在分析空间冗余法、时间冗余法和传输门屏蔽法的工作原理和优缺点的基础上,对SRAM外围电路的SET问题进一步加固优化。仿真结果证明,加固后的电路可以有效屏蔽SET效应,避免组合逻辑电路产生错误的数据并在时序逻辑电路中传输和保存。(3)版图加固通过释放累积电荷进而从根本上解决辐射效应。在横向对比常规版图加固方案适用性的基础上对面积损耗和工艺难度进行分析,最后采用缩短NMOS管与PMOS管N阱距离并增加衬底接触、阱接触的版图加固方案。结果证明,该方案不仅容易实现而且以最小的面积损耗实现对各种辐射效应的加固。(4)全定制芯片因耗时长、效率低等问题已经不能满足星载类芯片快速增长的抗辐射需求。因此,本文实现一款抗多节点翻转的抗辐射SRAM生成器并着重介绍生成器的图形界面设计和LIB视图生成器开发。结果证明,LIB视图生成器设计是成功的且其缩短了抗多节点翻转抗辐射SRAM的开发周期。更多还原

【Abstract】 As technology advances,semiconductors move into nanoscale processes.The shrinking of transistor feature size has closed the physical distance between sensitive nodes of SRAM,reducing the parasitic capacitance and critical charge of sensitive nodes,resulting in increased charge sharing effect and increasing incidence of multi-node flip-flop.Compared to fullcustom chips,semi-custom chips utilize EDA tools for automated design,improving chip design efficiency and significantly reducing the time to convert product requirements to actual products.Therefore,this thesis designs a radiation-resistant SRAM memory that is resistant to multi-node flip-flops and implements a generator for this radiation-resistant SRAM.The radiation-resistant SRAM is mainly studied for circuit-level hardening and plate-level hardening of SRAM.The main research is as follows:(1)Compare the classical radiation-resistant SRAM reinforced circuits,analyze the operation principle,fault tolerance principle,advantages and disadvantages of each circuit,and finally design an S8P8 N cell based on PMOS stacking structure and NMOS stacking structure by combining the design principle of anti-multi-node flip-flop circuit reinforcement.Simulation results demonstrate that the two-node flip rate of the S8P8 N cell is reduced by 75%and the three-node flip rate is reduced by 50% compared with the conventional DICE structure,achieving a breakthrough that DICE cannot tolerate three-node flip.In addition,I use the multi-threshold technique in the specific implementation to further reduce the circuit power consumption.(2)With process scaling,lower operating voltages and increased IC complexity,SETs are about to become the largest source of soft errors.Therefore,based on the analysis of the working principles,advantages and disadvantages of the spatial redundancy method,the temporal redundancy method and the transmission gate shielding method,the SET problem of the SRAM peripheral circuit is further solved.Simulation results prove that the reinforced circuit can effectively shield the SET effect and prevent the combinational logic circuit from generating erroneous data and transmitting and saving it in the timing logic circuit.(3)Plate reinforcement addresses the fundamental radiation effects by releasing the accumulated charge.Based on the cross-sectional comparison of the applicability of conventional plate-reinforcement schemes,the area loss and process difficulty were analyzed,and the plate-reinforcement scheme of shortening the NMOS tube and PMOS tube N-well distance and increasing the substrate contact and trap contact was finally adopted.The results show that this scheme is not only easy to implement but also achieves the reinforcement of various radiation effects with minimum area loss.(4)The fully customized chip can no longer meet the rapidly growing demand for radiation resistance of the satellite-based chip due to its long time consumption and low efficiency.Therefore,this thesis implements a multi-node flipped radiation-resistant SRAM generator and focuses on the graphical interface design of the generator and the development of the LIB view generator.The LIB view generator design proved to be successful and shortened the development cycle of the multi-node flip-flop radiation resistant SRAM.更多还原