节点文献
高频高效双钳位ZVS BUCK-BOOST直流变换器控制芯片设计
The Design of High Frequency and Efficiency Control Chip for Double Clamp ZVS BUCK-BOOST Dc Converter
【作者】 曹宇;
【导师】 钟锐;
【作者基本信息】 东南大学 , 微电子学与固体电子学, 2022, 硕士
【摘要】 现如今新能源汽车快速发展,借助四边形电感电流控制策略的双钳位ZVS Buck-Boost变换器作为隔离型直流变换器中的一员,目前广泛应用于车载电池管理系统的中间母线电源架构中。随着车载电源产品不断追求高功率密度、高效率和强抗干扰能力,高频高效双钳位ZVS Buck-Boost变换器控制芯片设计具有重要的研究价值。本论文首先设计了基于伏秒平衡的原边反馈闭环控制策略,通过采样钳位电容电压获取副边输出电压,避免了使用光电耦合器件,有利于减小系统成本并提高可靠性。其次建立了变换器的损耗模型,结合系统约束条件,分析出宽输入电压范围和全负载条件下系统最佳开关频率的选择方法,并设计出高效率多模式模拟控制方案。最后本论文对变换器控制芯片进行了研究和设计,包括上电时序和保护逻辑,针对原边反馈和高效率多模式控制,从原边采样准确性、开关频率精确性和死区可调性角度设计了可变/固定提前关断时间的伏秒平衡电路、双定时器电路和多模式控制电路。基于CSMC 0.25μm Enhance BCD工艺,利用Virtuoso软件对控制芯片进行整体仿真验证和版图设计,仿真结果表明:宽输入电压范围和全负载条件下,芯片输出电压稳定,最大纹波为54.35m V,恒压精度为±1.6%;动态过程中最大过冲电压为1.194V,恢复时间约4ms;多模式控制下平均转换效率约为71.13%,轻载效率为60.12%,满载条件下峰值效率可达89.39%;芯片面积约为10.24mm~2,芯片的功能和变换器性能均满足设计指标要求。
【Abstract】 With the rapid development of new energy vehicles,as a member of the isolated DC-DC converter,the Double Clamp ZVS Buck-Boost converter which uses the quadrilateral inductor current mode modulation is widely used in the intermediate bus architecture of the vehicle battery management system.With the continuous pursuit for high power density,high efficiency and strong anti-interference ability of vehicle power supply products,the design of high frequency and efficiency control chip for Double Clamp ZVS Buck-Boost converter has important research value.The primary-side feedback closed loop control strategy based on voltage second balance control scheme is firstly introduced in this dissertation,which obtains the secondary output voltage by sampling the clamping capacitor voltage to avoid the use of optical coupler to reduce system cost and improve reliability.Secondly,by analyzing the main loss sources of the Double Clamp ZVS Buck-Boost converter as fully as possible,the loss model of the converter is established.With regard to the main constraints of the supply system,an optimal switching frequency selection method is proposed to obtain minimal loss in the wide input range and full load condition.Finally,more effort is committed to design the control chip,including simple power-on sequence and protection logic.For primary-side feedback and high efficiency multi-mode control,a volt-second balance circuit with variable/fixed early shutdown time,a dual timer circuit and a multi-mode control circuit are worked out to increase primary-side sampling accuracy,switching frequency accuracy and dead time adjustability.Based on the CSMC 0.25μm Enhance BCD process,the overall simulation verification of the control chip is carried out and the layout is designed by Virtuoso software.Under wide input voltage range and full load conditions,the result shows that the system output voltage is stable,the maximum ripple is 49.79m V and the constant voltage accuracy is±1.6%;the maximum overshoot in the dynamic process is 1.194V,and the recovery time is 4ms approximately;the average efficiency under multi-mode control can reach 71.13%,the light load efficiency is 60.12%,the peak efficiency more than 89.39%under full load conditions;the chip area is about 10.24mm~2.The function of the chip and the performance of the converter meets the design expectation.
- 【网络出版投稿人】 东南大学 【网络出版年期】2024年 01期
- 【分类号】TM46