【作者】 张毅；

【导师】 邹雪城；

【作者基本信息】 华中科技大学 ， 半导体芯片系统设计与工艺， 2022， 硕士

【摘要】 随着电力电子技术的发展,半导体功率器件逐渐朝向高频化的方向不断突破,GaN功率器件具有高频率、高功率、低功耗等特性,具有硅基功率器件不具备的优势,得到了广泛应用。然而高频开关过程中的电磁干扰(Electro Magnetic Interference,EMI)会对系统产生严重的影响,另一方面,高速开关也使得开关损耗成为总体损耗中不可忽略的一部分。如何在极短的开关时间内实时调整驱动电流,在抑制电磁干扰的情况下减少开关损耗,成为国内外研究的热点。本文对增强型GaN功率器件的开关特性进行分析,提出了一种电流多段可编程的开环驱动方案,驱动控制分为主驱动控制和辅助驱动控制。主驱动控制将GaN功率器件的开关过程分为8个时间段进行控制,每个时间段有2~8个等级的电流可选。辅助驱动控制的时间等级和电流等级更为精确,将主驱动控制的每个时间段再次细分,可达到400 ps的时间精度;其输出电流也在主控制驱动的基础上分为2~6个更精细的电流等级。驱动方案包括多个模块:预编程模块用以读取片外存储器的数据作为控制位,逻辑控制模块用以预先设定好每个时间段的电流大小,输出驱动模块用以产生不同等级的驱动电流,保护模块用以在恶劣工况下对芯片和器件进行保护。本文的电路设计采用华虹0.18μm BCD工艺,根据驱动芯片的功能需求对各模块进行了规划分析,完成了电路设计和仿真验证,并进行了版图设计和后仿真验证。本文设计的芯片最大输出驱动电流为4.4 A,可控时间精度为400 ps,可以通过改变片外存储器的存储序列对增强型GaN器件的栅极充放电电流进行预编程。将本文设计的芯片和无源驱动的效果进行了对比,可以在同电流过冲的情况下降低19.3%的开通损耗,在同电压过冲的情况下降低63.4%的关断损耗。更多还原

【Abstract】 With the development of power electronics technology,semiconductor power devices are gradually making breakthroughs towards the tendency of high frequency.GaN power devices which have been widely used are provided with properties that silicon-based power devices don’t have,such as high frequency,high power,and low power consumption.However,EMI(Electromagnetic Interference)during high-frequency switching process has a serious impact on the system.On the other hand,high-speed switching also makes switching dissipation become a non-negligible part of the overall dissipation.How to realize real-time adjustment of the driving current in a very short switching time and how to reduce the switching loss while suppressing the electromagnetic interference have become research hotspots at home and abroad.In this thesis,the switching characteristics of enhancement-mode GaN power devices have been analyzed,and an open-loop driving scheme with multi-segment programmable current has been proposed.The drive control is composed of main drive control and auxiliary drive control.The switching process of the GaN power device is divided into 8controllable time periods by the main drive control,and 2~8 levels of current levels can be selected during each time period.The time level and current level of the auxiliary drive control are more accurate,and each time period of the main drive control is subdivided,which can reach 400 ps time accuracy;the output current of the auxiliary drive control is also divided into 2~6 finer current levels on the basis of the main control drive.The driving scheme includes several modules:the pre-programming module which reads the data of the off-chip memory used as control bits,the logic control module which pre-sets the magnitude of current during each time period,the output driving module which generates different levels of driving current,and the protection modules which are used to protect chips and devices under harsh conditions.The circuit design of this thesis adopts HHGrace 0.18μm BCD process.On the basis of the functional requirements of the driver chip,each block has been analyzed and schematized.The circuit design and simulation verification have been completed,in the meantime the layout design and post-simulation verification have been carried out.The maximum output driving current of the chip designed in this thesis is 4.4 A,and the controllable time accuracy can reach 400 ps.The gate charging and discharging current of the enhancement-mode GaN device can be pre-programmed by changing the storage sequences of the off-chip memory.While under the same under the same current overshoot,the turn-on loss of the chip designed in this thesis can be reduced by 19.3%compared with the passive driver,and the turn-on loss of the chip designed can be reduced by 63.4%while under the same voltage overshoot.更多还原