【作者】 李娟；

【导师】 杨军；

【作者基本信息】 云南大学 ， 计算机技术（专业学位）， 2021， 硕士

【摘要】 无迹卡尔曼滤波(Unscented Kalman Filter,UKF)算法因其具有精度高、复杂度低等优势广泛运用于无人自动驾驶、移动机器人定位等领域。随着目标领域对自主能力需求不断提高,UKF算法在这些领域还存在实时性较低等问题。FPGA(Field Programmable Gate Array)具有高并行性、高速、低功耗及重构性等优点,利用其优势实现UKF算法能够提高算法在目标领域的实时性,因此,如何运用FPGA技术研究UKF算法硬件加速具有一定的现实意义。本文以UKF算法为研究对象,对UKF算法中矩阵运算的硬件实现以及UKF算法的硬件加速设计两方面展开研究,主要工作如下:(1)本文针对改进Cholesky分解算法在矩阵求逆时存在速度慢、资源高等问题,将分解后的下三角矩阵元素等数据规模较大的数据存储在外部存储器,降低矩阵求逆运算对FPGA内部BRAM的依赖,提高运算速度,并优化其硬件实现结构,减少硬件资源消耗;(2)针对矩阵乘累加运算时间长,优化了其硬件实现结构,减少运算时长,更好地实现了流水运算;(3)为了充分发挥FPGA芯片并行度的优势,根据分区策略和流水线思想将UKF算法划分五个阶段独立运行,结合优化的矩阵运算,提出一种流水化的UKF算法硬件加速设计,按照自顶向下的思路给出了以Sigma采样点生成模块、预测模块、更新模块为主体的整体设计方案,并将UKF算法的非线性模型通过NiosⅡIDE 13.0编程来实现,其余部分在硬件上实现;(4)将提出的UKF算法硬件加速设计应用到无人机飞行控制系统中,验证本文设计的有效性并完成对该飞行控制系统整体系统的性能分析。实验表明,本文提出的UKF算法硬件加速设计方案与串行设计方案及并行设计方案实现相比,具有较高的速度,同时,系统资源可以根据不同的选择得到合理的分配,具有重构性好、灵活性较好等特点,在无人自动驾驶、移动机器人方面等具有一定的应用价值。更多还原

【Abstract】 Due to its better filter performance and low computational complexity,unscented kalman filter(UKF)algorithm has been widely applied to some fields,such as unmanned autonomous driving and mobile robot.With the increasing demand of autonomous capability for the target fields,UKF algorithm still existence of the disadvantage of low real-time.Due to the advantages of high parallelism,high speed,low power consumption and reconfigurability,realize the UKF algorithm by utilizing FPGA can improve its real-time performance.Therefore,how to utilize the advantages of FPGA to study the hardware acceleration of UKF algorithm has a certain practical significance.This thesis takes UKF algorithm as the research object and two research aspects are proceeded,hardware implementation of matrix operation in UKF algorithm and hardware acceleration design of UKF algorithm.At first,this theies taimed at the problems of slow speed and high logic resource occupancy of the improved Cholesky decomposition in the matrix inversion processes,stored the large-scale data such as lower triangular matrix elements after decomposition in external memory,which can reduce the dependence degree of matrix inversion on internal BRAM of FPGA,improve the operation speed,optimize the structure of its hardware implementation and reduce the occupancy of hardware resources.In view of the long operation time of matrix multiplication and accumulation,the hardware implementation structure is optimized and the flow operation is realized better.Then,in order to utilize the advantages of parallelism of the FPGA chip adequately,divided the UKF algorithm into five independent stages according to the partition strategy and pipeline idea,combined with the optimized matrix operation,put forward a streamlined hardware acceleration design of UKF algorithm.Based on top-down thinking,provided the overall design scheme and he main body is consist of generating module,prediction module and update module of Sigma sample point.And further,realize the nonlinear mode of UKF algorithm through Nios Ⅱ IDE 13.0 programmer and the remaining part are realized by hardware.Finally,applied the proposed hardware acceleration design of UKF algorithm to the UAV flight control system and completed the integral performance analysis of the system.Comparing with other reported schemes,the proposed hardware acceleration design of UKF algorithm in this paper has a higher speed.Meanwhile,the system resources can be allocated reasonably according to different choices.It possesses the characteristics of good reconfiguration and good flexibility,and has a certain application significance in some fields such as unmanned autonomous driving and mobile robots.更多还原