【作者】 何超；

【导师】 何春；

【作者基本信息】 电子科技大学 ， 工程硕士（专业学位）， 2022， 硕士

【摘要】 传统的正交多址接入技术,其连接数受限于正交资源数量,已经适应不了当前第五代通信技术(The 5th Geneartion,5G)的要求,因此非正交多址接入(Non-orthogonal Multiple Access,NOMA)技术应时而生。NOMA技术能够在相同资源总量的前提下连接更多的用户,所以NOMA技术在学术领域引起了广泛的关注。稀疏码分多址接入(Sparse Code Multiple Access,SCMA)技术作为一种编码域的NOMA技术,相比于其他的编码域NOMA技术,能够表现出更好的链路性能。由于SCMA系统的性能主要由SCMA码本和多用户检测算法决定,所以SCMA的码本设计方法和多用户检测算法如雨后春笋般出现。首先,本文针对加性高斯白噪声(Additive White Gaussian Noise,AWGN)信道提出了基于星座距离的SCMA码本设计方法,该码本设计方法将传统的码本设计问题转化叠加在资源块上多维用户星座的优化问题,优化准则是保证叠加在资源块上各个星座点之间距离超过某个阈值的情况下,最小化资源块星座点的平均能量。本文将该优化问题建模成非凸的优化问题,通过对可行性点跟踪与逐次逼近(FPP-SCA)算法,得到该优化问题的最优解,最终设计的码本在AWGN信道下比华为码本和梁燕码本的误码性能更好。其次,本文提出了一种基于飞蛾扑火(Moth-flame Optimization,MFO)算法的SCMA码本设计方法。该码本设计方法先设计带参数的复数域用户码字,以此得到一个带参数的SCMA码本,评判码本好坏的设计准则分别为最小化误码率(Min-BER)、最小化平均峰均功率比(Min-APAPR)和最大化平均互信息下界(Max-AMIL)。本文采用MFO算法对该三条码本设计准则进行求解,得到性能较好的码本,并且该算法适用于不同的过载率和信道。最终Min-BER码本在不同信道下比华为码本的误码性能更好,Min-APAPR码本和Max-AMIL码本在加入Turbo码后的性能比其他文献码本和Min-BER码本更好。最后,本文对15用户6资源块SCMA系统的最大对数消息传递(Max-LogMessage Passing Algorithm,Max-Log-MPA)算法进行硬件实现,首先采用精度损失较小的定点结果,对算法的顶层架构进行设计,随后对各个模块的架构进行设计。为了提高吞吐量,本文采用2路空间并行4级流水线处理,吞吐率能达到3.256Mbps。最终进行FPGA板级测试,测试结果说明硬件实现的正确性。更多还原

【Abstract】 The traditional orthogonal multiple access technology,the number of connections is limited by the number of orthogonal resources,has been unable to adapt to the requirements of current the 5th Generation communication(5G).Therefore,Non-orthogonal Multiple Access(NOMA)technology came into being.NOMA technology can connect more users under the premise of the same total amount of resources,so NOMA technology has attracted extensive attention in the academic field.Sparse Code Multiple Access(SCMA),as a code domain NOMA technology,can show better link performance than other code domain NOMA technologies.Because the performance of SCMA system is mainly determined by SCMA codebook and multi-user detection algorithm,so there are many SCMA codebook design methods and multi-user detection algorithms.First,this thesis proposes a SCMA codebook design method based on constellation distance for Additive White Gaussian Noise(AWGN)channel,this codebook design method transforms the traditional codebook design problem into the optimization problem of multi-dimensional user constellation superimposed on resource blocks,the optimization criterion is to minimize the average energy of the resource block constellation points when the distance between each constellation point superimposed on the resource block exceeds a certain threshold.In this thesis,the optimization problem is modeled as a nonconvex optimization problem,and the optimal solution of the optimization problem is obtained by Feasible Point Pursuit and Successive Approximation(FPP-SCA)algorithm,the final designed codebook has better bit error performance than Huawei codebook and Liangyan codebook in AWGN channel.Secondly,this thesis proposes a SCMA codebook design method based on Mothflame Optimization(MFO)algorithm,the codebook design method firstly designs a complex domain user codeword with parameters,so as to obtain a SCMA codebook with parameters,the design criteria to judge the quality of the codebook are to minimize the bit error rate(Min-BER),minimize the average peak-to-average power ratio(Min-APAPR)and maximize the lower bound of mutual information(Max-AMIL).In this thesis,MFO algorithm is used to solve the three codebook design criteria,can obtain the codebook with better performance,and the algorithm is suitable for different overload rates and channels.The final Min-BER codebook has better bit error performance than the Huawei codebook under different channels.After adding Turbo code,the performance of the MinAPAPR codebook and Max-AMIL codebook is better than other literature codebooks and Min-BER codebooks better.Finally,this thesis implements the Max-Log-Message Passing Algorithm(Max-LogMPA)for the SCMA system with fifteen users and six resource blocks in hardware.Firstly,this thesis uses the fixed-point result with less precision to design the top-level architecture of the algorithm,and then designs the architecture of each module.In order to improve the throughput,this thesis adopts two-way spatial parallel and four-stage pipeline processing,and the throughput rate can reach 3.256 Mbps.Finally,this thesis carries out the FPGA board-level test,and the test results show the correctness of the hardware implementation.更多还原