【作者】 李航；

【导师】 何卫锋；

【作者基本信息】 上海交通大学 ， 集成电路工程（专业学位）， 2020， 硕士

【摘要】 动态电压频率调节(Dynamic Voltage and Frequency Scaling,DVFS)是一种在满足性能需求的前提下,通过动态调节电压和时钟频率来降低功耗的技术。当工作在更宽的电压范围下,DVFS技术会使芯片获得更高的能效。然而,在宽电压调节范围下,电路在不同工作点的设计裕量及工作点间切换的代价会更高。论文面向宽工作电压范围,设计了结合片内电源轨切换和片外DC-DC调压的混合DVFS调节策略,完成了DVFS控制器的设计,并基于RISC-V处理器完成了验证系统的开发。首先,研究了宽电压范围的双电源轨切换技术。在分析了处理器在VDD/2到VDD电压范围间的电源轨切换时的电压噪声变化的基础上,设计了基于可配置开关速度的电源门控电路和基于短脉冲检测的时钟门控电路来减小切换噪声,并完成了双轨切换调压电路的设计。仿真结果表明,所设计的双轨切换方法在VDD/2到VDD的宽电压范围下切换速度在80ns/V-120ns/V之间,较传统方法有了显著提升。其次,完成了DVFS控制器的设计。其中,基于时钟频率快速切换技术设计了调频电路,基于片外DC-DC调压芯片的控制方法设计了片外调压控制电路,基于两种调压方式的混合调节策略设计了功耗管理电路。DVFS控制器的仿真结果表明,一个32位加法器在混合调节方法下的能耗延时积(Energy-Delay Product,EDP)比单独片外DC-DC调节时降低了29.74%。最后,基于上述DVFS控制器,设计了它与RISC-V处理器的接口,并搭建了含DVFS控制器的RISC-V SOC系统。采用TSMC 28nm工艺,通过UPF(Unified Power Format)低功耗设计方法,完成了SOC的多电压域设计和物理实现。二维卷积测试程序表明,DVFS控制器的接口电路功能正确,SOC系统在程序控制下正确完成了电压频率的调节。更多还原

【Abstract】 Dynamic Voltage and Frequency Scaling(DVFS)is a technique to reduce power consumption by adjusting the voltage and clock frequency dynamically with the throughput constraints.When a chip works at a wider range of supply voltage by adopting the DVFS strategy,energy efficiency of the chip will be higher.However,when the supply voltage is adjusted over a wider range,the design margin of the circuit at different operating points and the cost of switching between operating points will be higher.The thesis aims at a wide operating voltage range,and designs a hybrid DVFS regulation strategy that combines on-chip power rail switching and off-chip DC-DC voltage regulation,completes the design of the DVFS controller,and completes the development of the verification system based on the RISC-V processor.First,the dual-rail switching technology with a wide voltage range was studied.Based on the analysis of the voltage noise variation of the processor during the power rail switching from VDD/2 to VDD,a power gating circuit based on configurable speed and a clock gating circuit based on short pulse detection were designed to reduce switching noise,and completed the design of the dual-rail switching voltage regulator circuit.The simulation results show that the designed dual-rail switching method has a switching speed between 80ns/V-120ns/V in a wide voltage range from VDD/2 to VDD,which is a significant improvement over the traditional method.Secondly,the design of the DVFS controller is completed.Among them,the frequency modulation circuit is designed based on the clock frequency fast switching technology,the off-chip voltage regulation control circuit is designed based on the control method of the off-chip DC-DC voltage regulator chip,and the power management circuit is designed based on the mixed regulation strategy of two voltage regulation methods.The simulation results of the DVFS controller show that the energy-delay product(EDP)of a 32-bit adder under the hybrid regulation method is reduced by 29.74%compared with the single off-chip DC-DC regulation.Finally,based on the above DVFS controller,the interface between it and the RISC-V processor is designed,and a RISC-V SOC system with a DVFS controller is built.Using TSMC 28 nm process,through the Unified Power Format(UPF)low power design method,the multi-voltage domain design and physical implementation of the SOC are completed.The twodimensional convolution test program shows that the interface circuit function of the DVFS controller is correct,and the SOC system has correctly adjusted the voltage and frequency under program control.更多还原