【作者】 张悦；

【导师】 余宁梅；

【作者基本信息】 西安理工大学 ， 微电子学与固体电子学， 2020， 硕士

【摘要】 随着3D成像技术的不断发展,基于飞行时间(Time of flight,TOF)法的图像传感器因具有体积小、精度高、成像速度快等特点,近年来已经成为该领域的研究热点。锁相环电路(Phase locked loop,PLL)作为TOF图像传感器的核心模块,其性能是决定传感器成像距离与测距精度的关键因素。因此,对于TOF图像传感器的锁相环电路研究具有重要意义。本文通过对TOF图像传感器的成像原理及测距方法的研究与分析,设计了一款应用于TOF图像传感器的锁相环电路。结合实际应用需求及对几类锁相环结构的分析对比,本文设计的锁相环采用电荷泵结构,实现了快速锁定、宽输出范围的设计指标。电荷泵锁相环电路由鉴频鉴相器、电荷泵、滤波器、压控振荡器、分频器组成。在电荷泵的设计中,对共源共栅电荷泵结构进行了改进,有效提高了电流的匹配精度及电路充放电速度;在压控振荡器的设计中,采用了自偏置的差分环形振荡器,有效实现了宽输出的频率范围及抑制了电路噪声干扰;在滤波器的设计中采用无源结构,在实现电路稳定性的同时降低了版图面积。本文采用UMC 180nm工艺完成了应用于TOF图像传感器的锁相环设计,对电路进行了仿真分析及版图验证。结果表明:该锁相环电路工作于1.8V电源电压下,对于10MHz-25MHz范围的四类输入参考频率,振荡输出频率为129.83MHz-1.34GHz,锁相环电路仅在2.4μs内就能实现稳定,锁定频率达到600MHz。经分频模块实现20MHz、25MHz、50MHz、75MHz、100MHz多频率可调输出,实现了 1.5m-7.5m范围的测距需求,电路整体相位噪声为-104.74dBc/Hz@1MHz,系统功耗11mW,版图有效面积为480 μm×310 μm。更多还原

【Abstract】 With the continuous development of 3D imaging technology,the image sensor based on the Time of flight(TOF)method has become a research hotspot in recent years because of its small size,high accuracy,and fast imaging speed.As the core module of the TOF image sensor,the phase locked loop(PLL)circuit is the key factor that determines the imaging distance and ranging accuracy of the sensor.Therefore,it is of great significance to study the phase-locked loop circuit of TOF image sensor.In this paper,through the research and analysis of the imaging principle and ranging method of the TOF image sensor,a phase-locked loop circuit applied to the TOF image sensor is designed.Combined with the actual application requirements and the analysis and comparison of several types of phase-locked loop structures,the phase-locked loop designed in this paper adopts a charge pump structure to achieve the design index of fast locking and wide output range.The charge pump phase-locked loop circuit is composed of a frequency discriminator,a charge pump,a filter,a voltage controlled oscillator,and a frequency divider.In the design of the charge pump,the structure of the cascode charge pump is improved,which effectively improves the current matching accuracy and the circuit charge and discharge speed;In the design of the voltage-controlled oscillator,a self-biased differential ring oscillator is used,which effectively achieves a wide output frequency range and suppresses circuit noise interference;The passive structure is used in the design of the filter,which reduces the layout area while achieving circuit stability.This article uses UMC 180nm technology to complete the design of the phase-locked loop applied to the TOF image sensor,the simulation analysis and layout verification of the circuit.The results show that the PLL circuit operates at a 1.8V power supply voltage.For four types of input reference frequencies in the 10MHz-25MHz range,the oscillating output frequency is 129.83MHz-1.34GHz,and the PLL circuit can be implemented in 2.4μs.Stable,the locking frequency reaches 600MHz.20MHz,25MHz,50MHz,75MHz,100MHz multi-frequency adjustable output is realized through the frequency dividing module,and the ranging requirement in the range of 1.5m-7.5m is realized.The overall phase noise of the circuit is-104.74dBc/Hz@1MHz,and the system power consumption is 11mW,The effective area of the layout is 480 μm×310 μm.更多还原