【作者】 李鹏；

【导师】 赵光辉；

【作者基本信息】 西安电子科技大学 ， 电路与系统， 2020， 硕士

【摘要】 随着计算机视觉的不断发展,运动目标检测作为计算机视觉领域的关键问题成为了研究的热点。运动目标检测技术可以对视频进行逐帧分析,检测出每一帧图像中的运动目标。目前该技术的应用非常广泛,例如常见的视频监控都可以实现运动目标检测,另外在一些前沿技术领域如智能交通、无人驾驶等也有应用,而在这些领域,搭建一套体积小、功耗低的硬件平台来实现运动目标检测显得尤为重要。本文首先对运动目标检测算法进行研究,介绍了几种常用的算法,其中Vi Be算法是一种视频背景建模算法,具有瞬时初始化的优势,只用一帧图像就能快速初始化样本模型,使得检测在视频的第二帧就可以进行。与其他算法相比,它的思想简单,运算效率高,对弱小目标的检测更加敏感,并且易于实现,所以选取了Vi Be算法用于硬件平台实现。另外本文对算法进行了改进,提高了算法的适应性,使之能够很好地适应复杂背景。在MATLAB中进行对比实验,可以看出改进后的算法对于复杂背景具有较好的处理效果。FPGA内含丰富的逻辑资源,具有并行性的优势,运行时可以采用流水线的工作方式,因此本文选择FPGA作为算法处理单元,并基于目前主流的ZYNQ平台,设计一套运动目标检测系统。该系统采用OV5640摄像头采集视频图像,将图像送入算法初始化模块产生样本集,然后将后续的图像与样本集送入算法检测模块,得到运动目标和更新后的样本集,通过VDMA将图像数据存储到DDR中,使用HDMI将检测结果输出显示。但是当FPGA片上资源较少时,无法存储更多的样本集,影响检测效果,本文针对这一问题,创新性地提出了一种基于窗缓冲区的解决方案,将样本集存储在外部存储空间中,通过搭建窗缓冲区的方式从外部存储空间中读取样本集,这样便可以存储更多的样本集来提高检测效果,解决了算法在低成本FPGA上存储资源受限的问题。本文采用Zed Board开发板进行设计,OV5640和HDMI都采用Verilog设计并封装成IP核,使用Vivado HLS开发工具完成改进后Vi Be算法的开发,Vivado HLS可以将高级语言转化为硬件描述语言,并且可以封装成硬件IP核移植到FPGA中,缩短了开发流程。在可编程逻辑部分,我们可以通过调用IP核,进行IP核之间的连线,迅速地完成硬件平台的搭建。在处理器系统部分,主要是软件部分的开发,通过SDK开发工具进行摄像头寄存器的配置和VDMA读写地址的控制。通过软硬件协同的设计方式完成整个系统的设计。最后,根据测试结果可以看出本文搭建的系统能够实时检测出运动目标,并且该系统体积小、功耗低,满足在低成本场合下的使用,具有实用意义。更多还原

【Abstract】 With the development of computer vision,as a key issue in the field of computer vision,moving target detection has become a research hotspot.The moving target detection technology can analyze the video frame by frame and detect the moving target in each frame of image.At present,the application of this technology is very wide.For example,common video surveillance can achieve moving target detection.In addition,it is also used in some cutting-edge technology fields such as intelligent transportation and unmanned driving.In these areas,it is particularly important to build a small hardware platform with low power consumption to achieve moving target detection.This article first studies the moving target detection algorithm and introduces several commonly used algorithms.Among them,Vi Be algorithm is a video background modeling algorithm,which has the advantage of instantaneous initialization.The sample model can be quickly initialized with only one frame of image,so that detection can be performed in the second frame of the video.Compared with other algorithms,it has the advantages of simple idea,high efficiency,more sensitive to the detection of small and weak targets and easy to realize,so the Vi Be algorithm is selected for hardware platform implementation.In addition,this article improves the algorithm,which can improve the adaptability of the algorithm and make it adapt to the complex background well.Through comparative experiments in MATLAB,it can be seen that the improved algorithm has better processing effect on the complex background.FPGA contains rich logic resources and has the advantage of parallelism which can use pipelined working mode at runtime.Therefore,this article selects FPGA as the algorithm processing unit and designs a set of moving target detection system based on the current mainstream ZYNQ platform.The system uses OV5640 camera to collect video images,sends the images to the algorithm initialization module to generate the sample sets,then sends the subsequent images and sample sets to the algorithm detection module to obtain the moving target and the updated sample sets,and stores the image data in DDR through VDMA,HDMI is used to output the detection result.However,when there are fewer onchip FPGA resources,more sample sets cannot be stored,which affects the detection effect.In this article,a solution based on a window buffer is innovatively proposed to store the sample sets in an external storage space.In the method,the sample set is read from the external storage space by constructing a window buffer,so that more sample sets can be stored to improve the detection effect,and the problem that the algorithm has limited storage resources on the low-cost FPGA is solved.This article uses the Zed Board development board for design.Both OV5640 and HDMI are designed and packaged into IP cores using Verilog.The Vivado HLS development tool is used to complete the development of the improved Vi Be algorithm.Vivado HLS can convert high-level languages into hardware description languages and can be packaged the hardware IP core is transplanted into FPGA,which shortens the development process.In the programmable logic part,we can quickly build the hardware platform by calling the IP core and connecting the IP cores.In the processor system part,it mainly develops the software,uses SDK development tools to configure camera registers and control VDMA read and write addresses.The design of the whole system is completed through the design method of software and hardware cooperation.Finally,according to the test results,it can be seen that the system built in this paper can detect moving targets in real time,and the system is a small hardware platform with low power consumption,which is practical for low-cost applications.更多还原