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并行大模板灰度形态学滤波IP设计

Parallel Large Template Gray-scale Morphological Filtering IP Design

【作者】 李强

【导师】 桑红石;

【作者基本信息】 华中科技大学 , 控制工程, 2019, 硕士

【摘要】 灰度形态学滤波作为一种非线性空域滤波技术是图像预处理的基本技术之一,广泛的应用在目标检测和跟踪等图像处理系统中,主要用来实现平滑图像、凸显图像中感兴趣区域、描绘图像不同区域间的边界等图像预处理功能[1]。本文设计了基于FPGA实现的并行大模板灰度形态学滤波IP,IP实现的是一维灰度形态学滤波,结构元素大小可配置,通过调用本文设计的IP可以实现结构元素大小最大为81?81的二维灰度形态学滤波,降低存储资源消耗,减少滤波过程中大量的冗余计算,降低运算资源消耗,每个时钟周期并行处理8个像素,数据通过率高,能够应用于实时性要求高且硬件资源有限的嵌入式图像处理系统。针对IP实现必须降低存储资源消耗这一要求,设计了用一维形态学滤波实现二维形态学滤波的方案以减少大模板滤波时二维窗口生成对存储资源的消耗,对于一维形态学滤波列运算时的数据解析方式提出了要求,设计了列转置电路以达到每个周期像运算电路提供8个相邻的列像素。针对IP必须提高时钟工作频率以满足系统对系统的实时性要求这一问题,通过挖掘大模板形态学滤波过程中运算电路的可重用性,充分开发形态学滤波的并行性,提高了灰度形态学滤波IP的数据通过率。IP在配置为不同结构元素大小时,极值运算电路都相同且共用一个74输入极值电路,减少了运算资源消耗。根据上述方案,本文完成了并行大模板灰度形态学滤波IP电路设计、功能验证、综合以及布局布线的工作。IP设计在Xilinx公司XC7K325T-I型号FPGA上进行了逻辑综合和实现,最高时钟频率为150MHz。调用IP对大小为512?64 0的图像做一维灰度形态学腐蚀/膨胀时,耗时约为0.33ms,数据通过率达到984Mpx/s,实现二维灰度形态学腐蚀/膨胀时,耗时约为0.99ms,数据通过率达到328Mpx/s,完成二维灰度形态学开运算/闭运算时,耗时约为1.32ms,数据通过率达到246Mpx/s,利用较少的运算资源和存储资源可满足嵌入式图像处理系统的实时性要求。

【Abstract】 As a nonlinear spatial filtering technique,gray-scale morphological filtering is one of the basic techniques of image preprocessing.It is widely used in image processing systems such as target detection and tracking,and is mainly used to achieve smooth image.Highlight the region of interest in the image,describe the boundary between different regions of the image and other image preprocessing functions[1].In this paper,we designed a parallel large-template gray-scale morphological filtering IP based on FPGA,which is realized by one-dimensional gray-scale morphological filtering,the size of the structure element can be configured,and the two-dimensional gray-scale morphological filtering with the maximum structure element size of81?81can be realized by calling the IP designed in this paper.The invention reduces the consumption of the storage resources,reduces a large amount of redundant calculation in the filtering process,reduces the consumption of the operation resources,parallel processing of 8 pixels per clock cycle,output data rate is high,can be applied to an embedded image processing system with high real-time requirements and limited hardware resources.In order to reduce the storage resource consumption in IP implementation,a two-dimensional morphological filter based on one-dimensional morphological filter is designed to reduce the storage resource consumption caused by two-dimensional window generation in large template filtering.The data analysis mode of one-dimensional morphological filter column operation is required.A column transposition circuit is designed to provide eight adjacent column pixels per periodic image operation circuit.In view of the problem that IP must improve the clock working frequency to meet the real-time requirements of the system,the parallelism of morphological filtering is fully developed by mining the reusability of operation circuits in the process of morphological filtering with large templates.When IP is configured with different structural elements,the extreme value operation circuits are the same and share a 74 input extreme value circuit,which reduces the consumption of operation resources and improves the data pass rate of gray morphology filter IP.Meet the real-time requirements of the system.According to the above scheme,the design of parallel large template gray-scale morphological filtering IP circuit,functional verification,synthesis,layout and routing are completed in this paper.The logical synthesis and implemetation of IP is carried out on XC7K325T-I model FPGA of Xilinx Company.When the maximum clock frequency is150MHz,transfered IP to do one-dimensional gray-scal morphological erosion or dilation of image which size is512?64 0,the time consuming is about 0.33ms,the output data rate is achieved 984Mpx/s,when the two-dimensional gray-scale morphological erosion or dilation is realized.The time consuming is about 0.99ms,the output data rate is328Mpx/s,when the two-dimensional gray morphology open or closed operation is done,the time consuming is about 1.32ms,the output data rate is 246Mpx/s.Consume less computing and storage resources can meet the real-time requirements of embedded image processing system.

  • 【分类号】TN713;TP391.41
  • 【被引频次】2
  • 【下载频次】45
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