【作者】 陈强；

【导师】 王海卫；

【作者基本信息】 华中科技大学 ， 计算机技术， 2017， 硕士

【摘要】 高速缓存作为计算机系统中的一个重要部件用来缓解处理器与主存之间巨大的访问速度差异,但随着处理器技术的发展以及半导体制造工艺的进步,传统基于SRAM的缓存技术受限于存储单元面积过大和静态漏电功耗过高等问题,难以进一步扩展。自旋极化磁随机存储器(Spin-Transfer Torque Magnetic Random Access Memory,STT-MRAM)作为一种新型的非易失性存储技术,不仅具有高集成度、低静态功耗等特点,同时,它的读写速度、存储密度及写寿命均优于其他非易失性技术,因此最有希望替代SRAM用于高速缓存技术。基于STT-MRAM和SRAM的平行混合缓存架构,充分结合了STT-MRAM存储密度大、静态功耗低和SRAM读写速度快的优点。为了最大化的减少STT-MRAM缓存区的写操作,优化设计了如下迁移策略:1、立即迁移。写缺失数据均置于SRAM中,读缺失数据均置于STT-MRAM中。读命中位于SRAM中时,立即将该缓存块迁移至STT-MRAM中;写命中位于STTMRAM中时,立即将该块迁移至SRAM中。2、延迟迁移。针对立即迁移策略会产生较多次的迁移而降低性能的缺点进行了改进。只有在某缓存块有连续的读操作或连续的写操作时才进行迁移。3、自适应迁移。根据之前缓存块的访问模式预测缓存块的访问倾向,动态调整迁移。将写密集倾向的块迁移到SRAM中,而当SRAM空间足够的情况下读密集倾向的块可以不用迁移。另外优先驱逐死亡倾向的缓存块而不是优先进行块迁移操作。利用GEM5仿真平台对设计的平行混合缓存架构进行仿真实验,并对延迟迁移和自适应迁移策略进行了对比测试。实验表明:上述设计的平行混合缓存相较于纯的SRAM大大降低了缓存能耗,而所提出的自适应迁移策略的性能对比延迟迁移策略也有一定的提升。更多还原

【Abstract】 Cache as an important component in the computer system is used to relieve great access speed difference between the processor and main memory,but with the rapid development of processor technology and semiconductor manufacturing process,traditional Cache technology that based on the SRAM is limited by the factors such as the storage unit area and static power.STT-MRAM as a new type of nonvolatile memory,not only has the characteristics of high integration,low static power consumption,but also its writing and reading speed,storage density and write endurance are superior to other nonvolatile storage technology,thus it is the most promising alternative for SRAM to use for caching technology.The parallel hybrid cache architecture based on STT-MRAM and SRAM,fully combines the advantages of STT-MRAM’s large storage density and low static power consumption and the advantages of SRAM’s fast speed of reading and writing.In order to maximize reduce the write operation of STT-MRAM cache,we optimization design the migration strategy as follows:(1)Immediate transfer.Firstly,allocating all write-miss data blocks to SRAM and readmiss data blocks to STT-MRAM.Then,a read-hit on SRAM partition would make the data block transfer to the STT-MRAM partition,and a write-hit on STT-MRAM would make it transfer to the SRAM partition.(2)Delayed transfer.Immediate transfer sometimes causes a lot of migrations,in order to improve this,we design delayed transfer strategy,only a continuous reading or a continuous writing can cause a transfer.(3)Adaptive migration.According to the previous access model of a cache block to predictive the block’s access trend,then dynamic modify the transfer strategy.Making all write intensive cache block transfer to SRAM,but when the SRAM partition has enough space,we need not to transfer read intensive block to STT-MRAM.In addition,evicting a dead data block from SRAM is prior to transferring it to STT-MRAM.We carry out the simulation experiment of the parallel hybrid cache architecture on GEM5,and take a contrast test on the delayed transfer and the adaptive migration.Results show that the parallel hybrid cache architecture greatly reduces the energy consumption compared with pure SRAM cache,and the performance of the proposed adaptive migration strategy has certain improved compared to delayed transfer strategy.更多还原