【作者】 谷俊杰；

【导师】 马建国；

【作者基本信息】 天津大学 ， 微电子学与固体电子学， 2017， 硕士

【摘要】 随着无线通讯的快速发展,射频功率放大器(power amplifier,PA)广泛应用到生活的各个角落。随着CMOS集成电路工艺的快速发展,互连线的宽度和厚度逐渐变小,互连线中电流密度越来越大,引起了电路的电迁移失效;同时由于CMOS PA具有较低的功率附加效率,使得晶体管的大部分直流功率通过热的形式散发到电路中,进一步加剧了电迁移引起的失效,恶化了PA的可靠性。三维有限元建模可以将影响电迁移的多种驱动力如电流密度、温度和应力场耦合到一起进行分析,这一优势使得三维有限元建模被广泛应用。三维建模是通过手动建立三维的电路模型来进行计算,手动建模的过程是非常复杂的。除此之外,在利用有限元方法求解可靠性时,由于需要求解较多的自由度使得花费较多的计算时间,更严重地,如果电路的互连结构发生改变,或需要获取不同版图方案下电路的可靠性时,就需要对电路重新反复的建模,这个建模求解的过程是非常耗时的。因此迫切需要一种高效的方法来减少三维电路建模的繁琐和有限元仿真的耗时。针对这些问题,本文首次将APDL(ANSYS parametric design language)三维建模引入到PA互连可靠性分析中,采用APDL实现参数化的模型构建,通过改变版图变量赋值来自动的改变模型尺寸,从而实现参数化电路模型生成,克服了反复手动建模繁琐耗时这一缺点。在此基础上,本文将功率放大器互连可靠性分析方法与自动模型产生(Automated model generation,AMG)算法结合,引入到PA互连可靠性的分析中来,实现全自动的可靠性建模分析,并在AMG中添加智能化采样技术,减少在线性区采样个数,因此减小了采样的个数,缩短了有限元仿真时间。论文中对比了人工神经网络(Artificial Neural Network,ANN)和AMG在PA互连可靠性分析的不同来验证AMG的高效性,可见,AMG建模时间仅为ANN所耗费时间的49.2%。文中分析了PA在不同的工作条件、版图方案下的可靠性结果,阐述了版图结构对互连可靠性的影响。首次提出了建模模拟晶体管散热的方法,并验证了散热对电路互连可靠性造成的影响,指出了PA的输出功率与可靠性指标的关系,指导我们在电路指标和可靠性之间做权衡。更多还原

【Abstract】 With the amazing development of wireless communications,power amplifiers(PAs)are playing an irreplaceable role for various applications in various walks of life.The interconnect is become thinner and narrower with the development of CMOS technology.Electromigration(EM)induced interconnect failure has become a major reliability issue due to higher current density in the interconnect as the feature size in CMOS technology continues to shrink.Moreover,lower power added efficiency(PAE)restricted by the lossy substrate of CMOS results in higher heat generation from CMOS PA transistors,which aggravates the interconnect and circuit reliability.To evaluate the interconnect reliability of a PA,several reliability modeling and simulation approaches were proposed.In particular,3D circuit modeling is preferred because this method is able to integrate various driving forces(such as current,temperature,stress,etc.)in EM diffusion process.However,3D circuit model is accomplished manually in ANSYS Workbench according to the PA layout from Cadence.Drawing is a tedious process for a complicated PA.When the layout structure changes,the 3D circuit model must be reconstructed,which makes it more time consuming.Therefore,an automated modeling approach for the PA interconnect reliability which considers the heat generation from transistors is quite desired.Parametric modeling with ANSYS parametric design language(APDL)is used to construct the 3D PA model automatically,by embedding the geometrical parameters in the codes,different 3D PA models can be constructed by defining different geometrical variables,which makes the tedious modeling procedure a significant time-saver.Automated model generation(AMG)algorithm is an advanced method to automate the process of developing neural network models.In addition,AMG algorithm is applied in an effort to work with the simulation data from ANSYS to predict the reliability data quickly.A dynamic sampling method is adopted to speed up the simulation by reducing the training data.Therefore,a fully automated methodology is achieved to analyze the interconnect reliability without a waste of time and physical labor.In this paper,we made a comparison between AMG and the Artificial neural network(ANN)modeling to verify the feasibility of AMG.By using AMG,a reduction of 49.2% simulation time is achieved by using the dynamic sampling method.A series of experiments have been performed with different layout structures and operating conditions.The simulated reliability results offer a guideline to choose the PA layout based on the real RF performance and EM reliability during design stage.更多还原